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dm: zynq: usb: Convert to CONFIG_DM_USB
Convert zynq USB to driver model. Note this is tested on zynq-zybo only. Signed-off-by: Simon Glass <sjg@chromium.org>
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04e38905d7
commit
dec49e862e
@ -661,6 +661,7 @@ config ARCH_ZYNQ
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select DM_SERIAL
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select DM_SPI_FLASH
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select SPL_SEPARATE_BSS if SPL
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select DM_USB if USB
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config ARCH_ZYNQMP
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bool "Support Xilinx ZynqMP Platform"
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@ -671,6 +672,7 @@ config ARCH_ZYNQMP
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select SUPPORT_SPL
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select CLK
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select SPL_CLK
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select DM_USB if USB
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config TEGRA
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bool "NVIDIA Tegra"
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@ -7,55 +7,48 @@
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*/
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#include <common.h>
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#include <dm.h>
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#include <usb.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/io.h>
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#include <usb.h>
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#include <usb/ehci-ci.h>
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#include <usb/ulpi.h>
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#include "ehci.h"
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#define ZYNQ_USB_USBCMD_RST 0x0000002
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#define ZYNQ_USB_USBCMD_STOP 0x0000000
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#define ZYNQ_USB_NUM_MIO 12
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/*
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* Create the appropriate control structures to manage
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* a new EHCI host controller.
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*/
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int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr,
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struct ehci_hcor **hcor)
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{
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struct zynq_ehci_priv {
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struct ehci_ctrl ehcictrl;
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struct usb_ehci *ehci;
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};
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static int ehci_zynq_ofdata_to_platdata(struct udevice *dev)
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{
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struct zynq_ehci_priv *priv = dev_get_priv(dev);
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priv->ehci = (struct usb_ehci *)dev_get_addr_ptr(dev);
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if (!priv->ehci)
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return -EINVAL;
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return 0;
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}
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static int ehci_zynq_probe(struct udevice *dev)
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{
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struct usb_platdata *plat = dev_get_platdata(dev);
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struct zynq_ehci_priv *priv = dev_get_priv(dev);
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struct ehci_hccr *hccr;
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struct ehci_hcor *hcor;
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struct ulpi_viewport ulpi_vp;
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int ret, mio_usb;
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/* Used for writing the ULPI data address */
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struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
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int ret;
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if (!index) {
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mio_usb = zynq_slcr_get_mio_pin_status("usb0");
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if (mio_usb != ZYNQ_USB_NUM_MIO) {
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printf("usb0 wrong num MIO: %d, Index %d\n", mio_usb,
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index);
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return -1;
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}
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ehci = (struct usb_ehci *)ZYNQ_USB_BASEADDR0;
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} else {
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mio_usb = zynq_slcr_get_mio_pin_status("usb1");
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if (mio_usb != ZYNQ_USB_NUM_MIO) {
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printf("usb1 wrong num MIO: %d, Index %d\n", mio_usb,
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index);
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return -1;
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}
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ehci = (struct usb_ehci *)ZYNQ_USB_BASEADDR1;
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}
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hccr = (struct ehci_hccr *)((uint32_t)&priv->ehci->caplength);
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hcor = (struct ehci_hcor *)((uint32_t) hccr +
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HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
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*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
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*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
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HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
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ulpi_vp.viewport_addr = (u32)&ehci->ulpi_viewpoint;
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ulpi_vp.viewport_addr = (u32)&priv->ehci->ulpi_viewpoint;
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ulpi_vp.port_num = 0;
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ret = ulpi_init(&ulpi_vp);
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@ -77,28 +70,34 @@ int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr,
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ulpi_write(&ulpi_vp, &ulpi->otg_ctrl_set,
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ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
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return 0;
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return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type);
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}
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/*
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* Destroy the appropriate control structures corresponding
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* the the EHCI host controller.
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*/
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int ehci_hcd_stop(int index)
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static int ehci_zynq_remove(struct udevice *dev)
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{
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struct usb_ehci *ehci;
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int ret;
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if (!index)
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ehci = (struct usb_ehci *)ZYNQ_USB_BASEADDR0;
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else
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ehci = (struct usb_ehci *)ZYNQ_USB_BASEADDR1;
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/* Stop controller */
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writel(ZYNQ_USB_USBCMD_STOP, &ehci->usbcmd);
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udelay(1000);
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/* Initiate controller reset */
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writel(ZYNQ_USB_USBCMD_RST, &ehci->usbcmd);
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ret = ehci_deregister(dev);
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if (ret)
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return ret;
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return 0;
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}
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static const struct udevice_id ehci_zynq_ids[] = {
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{ .compatible = "xlnx,zynq-usb-2.20a" },
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{ }
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};
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U_BOOT_DRIVER(ehci_zynq) = {
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.name = "ehci_zynq",
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.id = UCLASS_USB,
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.of_match = ehci_zynq_ids,
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.ofdata_to_platdata = ehci_zynq_ofdata_to_platdata,
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.probe = ehci_zynq_probe,
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.remove = ehci_zynq_remove,
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.ops = &ehci_usb_ops,
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.platdata_auto_alloc_size = sizeof(struct usb_platdata),
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.priv_auto_alloc_size = sizeof(struct zynq_ehci_priv),
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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