mirror of
https://github.com/u-boot/u-boot.git
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Convert CONFIG_SYS_MPC85XX_NO_RESETVEC to Kconfig
This converts the following to Kconfig: CONFIG_SYS_MPC85XX_NO_RESETVEC Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
parent
5e5744cb2c
commit
de47ff5363
5
README
5
README
@ -2164,11 +2164,6 @@ Low Level (hardware related) configuration options:
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proper). Code that needs stage-specific behavior should check
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this.
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- CONFIG_SYS_MPC85XX_NO_RESETVEC
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Only for 85xx systems. If this variable is specified, the section
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.resetvec is not kept and the section .bootpg is placed in the
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previous 4k of the .text section.
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- CONFIG_ARCH_MAP_SYSMEM
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Generally U-Boot (and in particular the md command) uses
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effective address. It is therefore not necessary to regard
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@ -1185,6 +1185,29 @@ config SYS_FSL_LBC_CLK_DIV
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Defines divider of platform clock(clock input to
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eLBC controller).
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config SYS_MPC85XX_NO_RESETVEC
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bool "Discard resetvec section and move bootpg section up"
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depends on MPC85xx
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help
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If this variable is specified, the section .resetvec is not kept and
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the section .bootpg is placed in the previous 4k of the .text section.
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config SPL_SYS_MPC85XX_NO_RESETVEC
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bool "Discard resetvec section and move bootpg section up, in SPL"
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depends on MPC85xx && SPL
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help
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If this variable is specified, the section .resetvec is not kept and
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the section .bootpg is placed in the previous 4k of the .text section,
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of the SPL portion of the binary.
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config TPL_SYS_MPC85XX_NO_RESETVEC
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bool "Discard resetvec section and move bootpg section up, in TPL"
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depends on MPC85xx && TPL
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help
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If this variable is specified, the section .resetvec is not kept and
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the section .bootpg is placed in the previous 4k of the .text section,
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of the SPL portion of the binary.
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config FSL_VIA
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bool
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@ -15,7 +15,7 @@ SECTIONS
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. = IMAGE_TEXT_BASE;
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.text : {
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/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
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#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
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#if CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
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KEEP(*(.bootpg))
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#endif
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*(.text*)
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@ -66,7 +66,7 @@ SECTIONS
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#endif
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/* For nor and nand is needed the SPL with section .resetvec */
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#ifndef CONFIG_SYS_MPC85XX_NO_RESETVEC
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#if !CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
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#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
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#ifndef BOOT_PAGE_OFFSET
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#define BOOT_PAGE_OFFSET 0x1000
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@ -19,7 +19,7 @@ SECTIONS
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/* Read-only sections, merged into text segment: */
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.text :
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{
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#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
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#if CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
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KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
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#endif
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*(.text*)
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@ -74,7 +74,7 @@ SECTIONS
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__init_end = .;
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_end = .;
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#ifndef CONFIG_SYS_MPC85XX_NO_RESETVEC
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#if !CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
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.bootpg RESET_VECTOR_ADDRESS - 0xffc :
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{
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arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
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@ -14,6 +14,8 @@ CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PA=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PA=y
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CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -13,6 +13,8 @@ CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PA=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -15,6 +15,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PA=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -14,6 +14,8 @@ CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PA=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PA=y
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CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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@ -13,6 +13,8 @@ CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PA=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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@ -15,6 +15,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PA=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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@ -14,6 +14,8 @@ CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PB=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PB=y
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CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -13,6 +13,8 @@ CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PB=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -15,6 +15,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PB=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -14,6 +14,8 @@ CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PB=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PB=y
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CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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@ -13,6 +13,8 @@ CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PB=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_SPL_SPI=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PB=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P1020RDB_PC=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P1020RDB_PC=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_MP=y
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CONFIG_FIT=y
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@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P1020RDB_PC=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_MP=y
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CONFIG_FIT=y
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@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P1020RDB_PC=y
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CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P1020RDB_PC=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -13,6 +13,8 @@ CONFIG_SPL=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P1020RDB_PC=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P1020RDB_PC=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P1020RDB_PC=y
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CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P1020RDB_PD=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P1020RDB_PD=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P1020RDB_PD=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P1020RDB_PD=y
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CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -14,6 +14,8 @@ CONFIG_SPL=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P2020RDB=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_MP=y
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CONFIG_FIT=y
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@ -13,6 +13,8 @@ CONFIG_SPL=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P2020RDB=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_MP=y
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CONFIG_FIT=y
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@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P2020RDB=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_MP=y
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CONFIG_FIT=y
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@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P2020RDB=y
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CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_MP=y
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CONFIG_FIT=y
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@ -14,6 +14,8 @@ CONFIG_SPL=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P2020RDB=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -13,6 +13,8 @@ CONFIG_SPL=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P2020RDB=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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@ -15,6 +15,8 @@ CONFIG_SPL_SPI=y
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CONFIG_MPC85xx=y
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# CONFIG_CMD_ERRATA is not set
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CONFIG_TARGET_P2020RDB=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_MP=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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||||
|
@ -9,6 +9,7 @@ CONFIG_MPC85xx=y
|
||||
# CONFIG_CMD_ERRATA is not set
|
||||
CONFIG_TARGET_P2020RDB=y
|
||||
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_MP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
@ -12,6 +12,8 @@ CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T1024RDB=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_SYS_MEMTEST_START=0x00200000
|
||||
CONFIG_SYS_MEMTEST_END=0x00400000
|
||||
CONFIG_MP=y
|
||||
|
@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T1024RDB=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_SYS_MEMTEST_START=0x00200000
|
||||
CONFIG_SYS_MEMTEST_END=0x00400000
|
||||
CONFIG_MP=y
|
||||
|
@ -15,6 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T1024RDB=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_SYS_MEMTEST_START=0x00200000
|
||||
CONFIG_SYS_MEMTEST_END=0x00400000
|
||||
CONFIG_MP=y
|
||||
|
@ -11,6 +11,8 @@ CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T1042D4RDB=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_MP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
@ -12,6 +12,7 @@ CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T1042D4RDB=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_MP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
@ -14,6 +14,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T1042D4RDB=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_MP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
@ -18,6 +18,8 @@ CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T2080QDS=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_MP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
@ -19,6 +19,7 @@ CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T2080QDS=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_MP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
@ -21,6 +21,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T2080QDS=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_MP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
@ -15,6 +15,8 @@ CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T2080RDB=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_SYS_MEMTEST_START=0x00200000
|
||||
CONFIG_SYS_MEMTEST_END=0x00400000
|
||||
CONFIG_MP=y
|
||||
|
@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T2080RDB=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_SYS_MEMTEST_START=0x00200000
|
||||
CONFIG_SYS_MEMTEST_END=0x00400000
|
||||
CONFIG_MP=y
|
||||
|
@ -18,6 +18,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T2080RDB=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_SYS_MEMTEST_START=0x00200000
|
||||
CONFIG_SYS_MEMTEST_END=0x00400000
|
||||
CONFIG_MP=y
|
||||
|
@ -15,6 +15,8 @@ CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T2080RDB=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_T2080RDB_REV_D=y
|
||||
CONFIG_SYS_MEMTEST_START=0x00200000
|
||||
CONFIG_SYS_MEMTEST_END=0x00400000
|
||||
|
@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T2080RDB=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_T2080RDB_REV_D=y
|
||||
CONFIG_SYS_MEMTEST_START=0x00200000
|
||||
CONFIG_SYS_MEMTEST_END=0x00400000
|
||||
|
@ -18,6 +18,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T2080RDB=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_T2080RDB_REV_D=y
|
||||
CONFIG_SYS_MEMTEST_START=0x00200000
|
||||
CONFIG_SYS_MEMTEST_END=0x00400000
|
||||
|
@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T4240RDB=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_MP=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
|
@ -6,6 +6,7 @@ CONFIG_SYS_CLK_FREQ=33000000
|
||||
CONFIG_MPC85xx=y
|
||||
# CONFIG_CMD_ERRATA is not set
|
||||
CONFIG_TARGET_QEMU_PPCE500=y
|
||||
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
|
@ -20,7 +20,6 @@
|
||||
#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000)
|
||||
#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000)
|
||||
#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10)
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SPIFLASH
|
||||
@ -32,7 +31,6 @@
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10)
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@ -43,7 +41,6 @@
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
|
||||
#else
|
||||
#ifdef CONFIG_TPL_BUILD
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10)
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000)
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START (0x11000000)
|
||||
@ -51,10 +48,6 @@
|
||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10)
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST 0xD0000000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START 0xD0000000
|
||||
#else
|
||||
#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
@ -28,9 +28,6 @@
|
||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
|
||||
#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SPIFLASH
|
||||
@ -39,9 +36,6 @@
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x30000000)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10)
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SDCARD
|
||||
@ -50,9 +44,6 @@
|
||||
#define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000)
|
||||
#define CONFIG_SYS_MMC_U_BOOT_START (0x30000000)
|
||||
#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10)
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_RAMBOOT_PBL */
|
||||
|
@ -32,9 +32,6 @@
|
||||
#endif
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
|
||||
#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SPIFLASH
|
||||
@ -43,9 +40,6 @@
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x30000000)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10)
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SDCARD
|
||||
@ -54,9 +48,6 @@
|
||||
#define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000)
|
||||
#define CONFIG_SYS_MMC_U_BOOT_START (0x30000000)
|
||||
#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10)
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
@ -35,9 +35,6 @@
|
||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
|
||||
#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SPIFLASH
|
||||
@ -46,9 +43,6 @@
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x00200000)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10)
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SDCARD
|
||||
@ -57,9 +51,6 @@
|
||||
#define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000)
|
||||
#define CONFIG_SYS_MMC_U_BOOT_START (0x00200000)
|
||||
#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10)
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_RAMBOOT_PBL */
|
||||
|
@ -30,9 +30,6 @@
|
||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
|
||||
#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SPIFLASH
|
||||
@ -41,9 +38,6 @@
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x00200000)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10)
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SDCARD
|
||||
@ -52,9 +46,6 @@
|
||||
#define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000)
|
||||
#define CONFIG_SYS_MMC_U_BOOT_START (0x00200000)
|
||||
#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10)
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_RAMBOOT_PBL */
|
||||
|
@ -30,9 +30,6 @@
|
||||
#define CONFIG_SYS_MMC_U_BOOT_DST 0x00200000
|
||||
#define CONFIG_SYS_MMC_U_BOOT_START 0x00200000
|
||||
#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10)
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
@ -81,16 +81,13 @@
|
||||
#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000)
|
||||
#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000)
|
||||
#define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10)
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#elif defined(CONFIG_SPIFLASH)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000)
|
||||
#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10)
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#elif defined(CONFIG_MTD_RAW_NAND)
|
||||
#ifdef CONFIG_TPL_BUILD
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10)
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000)
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START (0x11000000)
|
||||
@ -98,10 +95,6 @@
|
||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10)
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000
|
||||
#else
|
||||
#ifndef CONFIG_MPC85XX_HAVE_RESET_VECTOR
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
#endif
|
||||
#endif /* not CONFIG_TPL_BUILD */
|
||||
#endif
|
||||
|
||||
|
@ -9,8 +9,6 @@
|
||||
#ifndef __QEMU_PPCE500_H
|
||||
#define __QEMU_PPCE500_H
|
||||
|
||||
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
|
||||
|
||||
#define CONFIG_SYS_RAMBOOT
|
||||
|
||||
#define CONFIG_ENABLE_36BIT_PHYS
|
||||
|
Loading…
Reference in New Issue
Block a user