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board: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD

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Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2024-09-29 19:49:47 -06:00 committed by Tom Rini
parent bef9fdbed2
commit dac3ce976a
305 changed files with 456 additions and 456 deletions
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2
board/BuR/brppt1/Makefile
View File

@ -5,7 +5,7 @@
# Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
# Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
ifeq ($(CONFIG_SPL_BUILD),y)
ifeq ($(CONFIG_XPL_BUILD),y)
obj-y := mux.o
endif
obj-y += ../common/common.o

4
board/BuR/brppt1/board.c
View File

@ -38,7 +38,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* -- defines for GPIO -- */
#define REPSWITCH (0+20) /* GPIO0_20 */
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_XPL_BUILD)
/* TODO: check ram-timing ! */
static const struct ddr_data ddr3_data = {
.datardsratio0 = MT41K256M16HA125E_RD_DQS,
@ -142,7 +142,7 @@ void sdram_init(void)
&ddr3_cmd_ctrl_data,
&ddr3_emif_reg_data, 0);
}
#endif /* CONFIG_SPL_BUILD */
#endif /* CONFIG_XPL_BUILD */
/* Basic board specific setup. Pinmux has been handled already. */
int board_init(void)

6
board/BuR/brppt2/board.c
View File

@ -16,7 +16,7 @@
#include <asm/arch/sys_proto.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
# include <asm/arch/mx6-ddr.h>
#endif
#include <asm/arch/clock.h>
@ -82,7 +82,7 @@
#define MUXDESC(pad, ctrl) IOMUX_PADS(pad | MUX_PAD_CTRL(ctrl))
#if !defined(CONFIG_SPL_BUILD)
#if !defined(CONFIG_XPL_BUILD)
static iomux_v3_cfg_t const eth_pads[] = {
/*
* Gigabit Ethernet
@ -542,4 +542,4 @@ void board_init_f(ulong dummy)
void reset_cpu(void)
{
}
#endif /* CONFIG_SPL_BUILD */
#endif /* CONFIG_XPL_BUILD */

2
board/BuR/brppt2/config.mk
View File

@ -23,7 +23,7 @@ cmd_prodzip = \
zip -9 -r $@ misc/* >/dev/null $<
ifeq ($(hw-platform-y),brppt2)
ifneq ($(CONFIG_SPL_BUILD),y)
ifneq ($(CONFIG_XPL_BUILD),y)
INPUTS-y += $(hw-platform-y)_prog.bin
INPUTS-y += $(hw-platform-y)_prod.zip
endif

2
board/BuR/brsmarc1/Makefile
View File

@ -4,7 +4,7 @@
# B&R Industrial Automation GmbH - http://www.br-automation.com/
#
obj-$(CONFIG_SPL_BUILD) += mux.o
obj-$(CONFIG_XPL_BUILD) += mux.o
obj-y += ../common/br_resetc.o
obj-y += ../common/common.o
obj-y += board.o

8
board/BuR/brsmarc1/board.c
View File

@ -32,7 +32,7 @@
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_XPL_BUILD)
static const struct ddr_data ddr3_data = {
.datardsratio0 = MT41K256M16HA125E_RD_DQS,
.datawdsratio0 = MT41K256M16HA125E_WR_DQS,
@ -124,8 +124,8 @@ void sdram_init(void)
&ddr3_cmd_ctrl_data,
&ddr3_emif_reg_data, 0);
}
#endif /* CONFIG_SPL_BUILD */
#if !defined(CONFIG_SPL_BUILD)
#endif /* CONFIG_XPL_BUILD */
#if !defined(CONFIG_XPL_BUILD)
/* decision if backlight is switched on or not on powerup */
int board_backlightstate(void)
@ -166,4 +166,4 @@ int board_late_init(void)
}
#endif /* CONFIG_BOARD_LATE_INIT */
#endif /* !CONFIG_SPL_BUILD */
#endif /* !CONFIG_XPL_BUILD */

2
board/BuR/brxre1/Makefile
View File

@ -5,7 +5,7 @@
# Copyright (C) 2014 Hannes Schmelzer <oe5hpm@oevsv.at> -
# Bernecker & Rainer Industrielektronik GmbH - http://www.br-automation.com/
obj-$(CONFIG_SPL_BUILD) += mux.o
obj-$(CONFIG_XPL_BUILD) += mux.o
obj-y += ../common/br_resetc.o
obj-y += ../common/common.o
obj-y += board.o

4
board/BuR/brxre1/board.c
View File

@ -39,7 +39,7 @@
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_XPL_BUILD)
static const struct ddr_data ddr3_data = {
.datardsratio0 = MT41K256M16HA125E_RD_DQS,
.datawdsratio0 = MT41K256M16HA125E_WR_DQS,
@ -134,7 +134,7 @@ void sdram_init(void)
&ddr3_cmd_ctrl_data,
&ddr3_emif_reg_data, 0);
}
#endif /* CONFIG_SPL_BUILD */
#endif /* CONFIG_XPL_BUILD */
/*
* Basic board specific setup. Pinmux has been handled already.
*/

4
board/BuR/common/common.c
View File

@ -83,7 +83,7 @@ int overwrite_console(void)
return 1;
}
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_AM33XX)
#if defined(CONFIG_XPL_BUILD) && defined(CONFIG_AM33XX)
#include <asm/arch/hardware.h>
#include <asm/arch/omap.h>
#include <asm/arch/clock.h>
@ -175,4 +175,4 @@ void set_mux_conf_regs(void)
enable_board_pin_mux();
}
#endif /* CONFIG_SPL_BUILD && CONFIG_AM33XX */
#endif /* CONFIG_XPL_BUILD && CONFIG_AM33XX */

2
board/CZ.NIC/turris_1x/Makefile
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
# (C) 2022 Pali Rohár <pali@kernel.org>
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += ../../freescale/p1_p2_rdb_pc/spl.o
endif

2
board/CZ.NIC/turris_1x/tlb.c
View File

@ -111,7 +111,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
0, 9, BOOKE_PAGESZ_256K, 1),
#endif
#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_SPL) && !defined(CONFIG_XPL_BUILD)
/* **M** - SDRAM 2G */
SET_TLB_ENTRY(1, CFG_SYS_DDR_SDRAM_BASE,
CFG_SYS_DDR_SDRAM_BASE,

2
board/CZ.NIC/turris_omnia/Makefile
View File

@ -4,4 +4,4 @@
obj-y := turris_omnia.o ../turris_atsha_otp.o ../turris_common.o
obj-$(CONFIG_CMD_EEPROM_LAYOUT) += eeprom.o
obj-$(CONFIG_SPL_BUILD) += old_ddr3_training.o
obj-$(CONFIG_XPL_BUILD) += old_ddr3_training.o

2
board/CZ.NIC/turris_omnia/turris_omnia.c
View File

@ -494,7 +494,7 @@ static bool omnia_read_eeprom(struct omnia_eeprom *oep)
if (!eeprom)
return false;
if (IS_ENABLED(CONFIG_SPL_BUILD))
if (IS_ENABLED(CONFIG_XPL_BUILD))
ret = dm_i2c_read(eeprom, 0, (void *)oep, sizeof(*oep));
else
ret = i2c_eeprom_read(eeprom, 0, (void *)oep, sizeof(*oep));

2
board/Synology/ds414/Makefile
View File

@ -3,6 +3,6 @@
# Copyright (C) 2015 Phil Sutter <phil@nwl.cc>
obj-y += ds414.o
ifndef CONFIG_SPL_BUILD
ifndef CONFIG_XPL_BUILD
obj-y += cmd_syno.o
endif

4
board/advantech/imx8mp_rsb3720a1/Makefile
View File

@ -8,7 +8,7 @@
ifdef CONFIG_TARGET_IMX8MP_RSB3720A1_6G
obj-y += imx8mp_rsb3720a1.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing_rsb3720a1_6G.o
endif
@ -17,7 +17,7 @@ endif
ifdef CONFIG_TARGET_IMX8MP_RSB3720A1_4G
obj-y += imx8mp_rsb3720a1.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing_rsb3720a1_4G.o
endif

2
board/advantech/imx8qm_dmsse20_a1/Makefile
View File

@ -5,4 +5,4 @@
#
obj-y += imx8qm_dmsse20_a1.o
obj-$(CONFIG_SPL_BUILD) += spl.o
obj-$(CONFIG_XPL_BUILD) += spl.o

2
board/advantech/imx8qm_rom7720_a1/Makefile
View File

@ -6,6 +6,6 @@
obj-y += imx8qm_rom7720_a1.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
endif

2
board/alliedtelesis/x530/Makefile
View File

@ -4,6 +4,6 @@
#
obj-y := $(BOARD).o
ifndef CONFIG_SPL_BUILD
ifndef CONFIG_XPL_BUILD
obj-y += ../common/gpio_hog.o
endif

2
board/asus/grouper/Makefile
View File

@ -6,7 +6,7 @@
# (C) Copyright 2021
# Svyatoslav Ryhel <clamor95@gmail.com>
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-$(CONFIG_DM_PMIC_MAX77663) += grouper-spl-max.o
obj-$(CONFIG_DM_PMIC_TPS65910) += grouper-spl-ti.o
endif

2
board/asus/transformer-t30/Makefile
View File

@ -6,6 +6,6 @@
# (C) Copyright 2021
# Svyatoslav Ryhel <clamor95@gmail.com>
obj-$(CONFIG_SPL_BUILD) += transformer-t30-spl.o
obj-$(CONFIG_XPL_BUILD) += transformer-t30-spl.o
obj-y += transformer-t30.o

2
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
View File

@ -70,7 +70,7 @@ void at91sam9m10g45ek_nand_hw_init(void)
}
#endif
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_XPL_BUILD)
#include <spl.h>
#include <nand.h>

2
board/atmel/at91sam9n12ek/at91sam9n12ek.c
View File

@ -119,7 +119,7 @@ int dram_init(void)
return 0;
}
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_XPL_BUILD)
#include <spl.h>
#include <nand.h>

2
board/atmel/at91sam9x5ek/at91sam9x5ek.c
View File

@ -134,7 +134,7 @@ int dram_init(void)
return 0;
}
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_XPL_BUILD)
#include <spl.h>
#include <nand.h>

2
board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
View File

@ -105,7 +105,7 @@ int misc_init_r(void)
#endif
/* SPL */
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
void spl_board_init(void)
{
}

2
board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c
View File

@ -90,7 +90,7 @@ int dram_init(void)
}
/* SPL */
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
static void board_leds_init(void)
{

2
board/atmel/sama5d2_icp/sama5d2_icp.c
View File

@ -79,7 +79,7 @@ int misc_init_r(void)
}
/* SPL */
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
/* must set PB25 low to enable the CAN transceivers */
static void board_can_stdby_dis(void)

2
board/atmel/sama5d2_xplained/sama5d2_xplained.c
View File

@ -105,7 +105,7 @@ int misc_init_r(void)
#endif
/* SPL */
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
void spl_board_init(void)
{
}

2
board/atmel/sama5d3_xplained/sama5d3_xplained.c
View File

@ -117,7 +117,7 @@ int dram_init(void)
}
/* SPL */
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
void spl_board_init(void)
{
#ifdef CONFIG_SD_BOOT

2
board/atmel/sama5d3xek/sama5d3xek.c
View File

@ -194,7 +194,7 @@ int board_late_init(void)
#endif
/* SPL */
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
void spl_board_init(void)
{
#if CONFIG_NAND_BOOT

2
board/atmel/sama5d4_xplained/sama5d4_xplained.c
View File

@ -141,7 +141,7 @@ int dram_init(void)
}
/* SPL */
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
void spl_board_init(void)
{
#if CONFIG_NAND_BOOT

2
board/atmel/sama5d4ek/sama5d4ek.c
View File

@ -127,7 +127,7 @@ int dram_init(void)
}
/* SPL */
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
void spl_board_init(void)
{
#if CONFIG_NAND_BOOT

2
board/avionic-design/tec-ng/Makefile
View File

@ -3,6 +3,6 @@
# (C) Copyright 2013
# Avionic Design GmbH <www.avionic-design.de>
obj-$(CONFIG_SPL_BUILD) += tec-ng-spl.o
obj-$(CONFIG_XPL_BUILD) += tec-ng-spl.o
obj-y += ../common/tamonten-ng.o

2
board/beacon/imx8mm/Makefile
View File

@ -7,7 +7,7 @@
obj-y += imx8mm_beacon.o
obj-y += ../../freescale/common/
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
obj-y += lpddr4_timing.o
endif

2
board/beacon/imx8mn/Makefile
View File

@ -6,7 +6,7 @@
obj-y += imx8mn_beacon.o
obj-y += ../../freescale/common/
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
ifdef CONFIG_IMX8MN_BEACON_2GB_LPDDR
obj-y += lpddr4_2g_timing.o

2
board/beacon/imx8mp/Makefile
View File

@ -7,7 +7,7 @@
obj-y += imx8mp_beacon.o
obj-y += ../../freescale/common/
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
endif

2
board/bitmain/antminer_s9/Makefile
View File

@ -6,4 +6,4 @@ obj-y += ../../xilinx/common/board.o
# Remove quotes
hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE))
obj-$(CONFIG_SPL_BUILD) += $(hw-platform-y)/ps7_init_gpl.o
obj-$(CONFIG_XPL_BUILD) += $(hw-platform-y)/ps7_init_gpl.o

2
board/bosch/acc/acc.c
View File

@ -269,7 +269,7 @@ int dram_init(void)
return 0;
}
#if IS_ENABLED(CONFIG_SPL_BUILD)
#if IS_ENABLED(CONFIG_XPL_BUILD)
#include <asm/arch/crm_regs.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>

4
board/bosch/shc/board.c
View File

@ -259,7 +259,7 @@ static void check_button_status(void)
}
}
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_XPL_BUILD)
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)
{
@ -473,7 +473,7 @@ int board_late_init(void)
#endif
#if defined(CONFIG_USB_ETHER) && \
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USB_ETHER))
(!defined(CONFIG_XPL_BUILD) || defined(CONFIG_SPL_USB_ETHER))
int board_eth_init(struct bd_info *bis)
{
return usb_eth_initialize(bis);

2
board/bsh/imx6ulz_smm_m2/Makefile
View File

@ -2,5 +2,5 @@
# (C) Copyright 2021 Amarula Solutions B.V.
obj-y := imx6ulz_smm_m2.o
obj-$(CONFIG_SPL_BUILD) += spl.o
obj-$(CONFIG_XPL_BUILD) += spl.o

2
board/bsh/imx8mn_smm_s2/Makefile
View File

@ -6,7 +6,7 @@
obj-y += imx8mn_smm_s2.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
obj-$(CONFIG_BSH_SMM_S2_DDR3L_256) += ddr3l_timing_256m.o
obj-$(CONFIG_BSH_SMM_S2_DDR3L_512) += ddr3l_timing_512m.o

2
board/bticino/mamoj/Makefile
View File

@ -5,4 +5,4 @@
#
obj-y := mamoj.o
obj-$(CONFIG_SPL_BUILD) += spl.o
obj-$(CONFIG_XPL_BUILD) += spl.o

2
board/cloos/imx8mm_phg/Makefile
View File

@ -6,7 +6,7 @@
obj-y += imx8mm_phg.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
endif

2
board/compulab/cl-som-imx7/Makefile
View File

@ -10,7 +10,7 @@
obj-y := mux.o common.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
else
obj-y += cl-som-imx7.o

4
board/compulab/cl-som-imx7/common.h
View File

@ -18,7 +18,7 @@ PADS_SET_PROT(uart1_pads);
PADS_SET_PROT(espi1_pads);
#endif /* CONFIG_SPI */
#ifndef CONFIG_SPL_BUILD
#ifndef CONFIG_XPL_BUILD
#ifdef CONFIG_FSL_ESDHC_IMX
PADS_SET_PROT(usdhc3_emmc_pads);
#endif /* CONFIG_FSL_ESDHC_IMX */
@ -28,4 +28,4 @@ PADS_SET_PROT(fec1_pads);
#endif /* CONFIG_FEC_MXC */
PADS_SET_PROT(usb_otg1_pads);
PADS_SET_PROT(wdog_pads);
#endif /* !CONFIG_SPL_BUILD */
#endif /* !CONFIG_XPL_BUILD */

4
board/compulab/cl-som-imx7/mux.c
View File

@ -67,7 +67,7 @@ PADS_SET(espi1_pads)
#endif /* CONFIG_SPI */
#ifndef CONFIG_SPL_BUILD
#ifndef CONFIG_XPL_BUILD
#ifdef CONFIG_FSL_ESDHC_IMX
@ -138,4 +138,4 @@ static iomux_v3_cfg_t const wdog_pads[] = {
PADS_SET(wdog_pads)
#endif /* !CONFIG_SPL_BUILD */
#endif /* !CONFIG_XPL_BUILD */

2
board/compulab/cm_fx6/Makefile
View File

@ -3,7 +3,7 @@
# (C) Copyright 2014 CompuLab, Ltd. <www.compulab.co.il>
#
# Authors: Nikita Kiryanov <nikita@compulab.co.il>
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y = common.o spl.o
else
obj-y = common.o cm_fx6.o

2
board/compulab/cm_t43/Makefile
View File

@ -4,7 +4,7 @@
#
# Copyright (C) 2015 Compulab, Ltd.
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o mux.o
else
obj-y += cm_t43.o mux.o

2
board/compulab/imx8mm-cl-iot-gate/Makefile
View File

@ -7,7 +7,7 @@
obj-y += imx8mm-cl-iot-gate.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o eeprom_spl.o
obj-y += ddr/
endif

2
board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c
View File

@ -10,7 +10,7 @@
#include <asm/setup.h>
#include <linux/delay.h>
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
#define CFG_SYS_I2C_EEPROM_ADDR_P1 0x51

2
board/comvetia/lxr2/lxr2.c
View File

@ -138,7 +138,7 @@ int board_late_init(void)
return 0;
}
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
#include <spl.h>
#define MX6_PHYFLEX_ERR006282 IMX_GPIO_NR(2, 11)

2
board/conclusive/kstr-sama5d27/kstr-sama5d27.c
View File

@ -141,7 +141,7 @@ int dram_init(void)
}
/* SPL */
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
void spl_board_init(void)
{
}

2
board/congatec/cgtqmx8/Makefile
View File

@ -6,6 +6,6 @@
obj-y += cgtqmx8.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
endif

2
board/congatec/common/Makefile
View File

@ -7,7 +7,7 @@
MINIMAL=
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
ifndef CONFIG_TPL_BUILD
ifdef CONFIG_SPL_INIT_MINIMAL
MINIMAL=y

2
board/data_modul/common/common.c
View File

@ -72,7 +72,7 @@ int board_phys_sdram_size(phys_size_t *size)
return 0;
}
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
static void data_modul_imx_edm_sbc_early_init_f(const iomux_v3_cfg_t wdog_pad)
{
struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;

2
board/data_modul/imx8mm_edm_sbc/Makefile
View File

@ -4,7 +4,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o lpddr4_timing_2G_32.o lpddr4_timing_4G_32.o
else
obj-y += imx8mm_data_modul_edm_sbc.o

2
board/data_modul/imx8mp_edm_sbc/Makefile
View File

@ -4,7 +4,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o lpddr4_timing_4G_32.o
else
obj-y += imx8mp_data_modul_edm_sbc.o

2
board/davinci/da8xxevm/omapl138_lcdk.c
View File

@ -311,7 +311,7 @@ int board_mmc_init(struct bd_info *bis)
#endif
#endif
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
static const struct ns16550_plat serial_pdata = {
.base = DAVINCI_UART2_BASE,
.reg_shift = 2,

2
board/dhelectronics/dh_imx6/Makefile
View File

@ -2,7 +2,7 @@
#
# Copyright (C) 2017 Marek Vasut <marex@denx.de>
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y := dh_imx6_spl.o
else
obj-y := dh_imx6.o

2
board/dhelectronics/dh_imx8mp/Makefile
View File

@ -4,7 +4,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o lpddr4_timing_2G_32.o lpddr4_timing_4G_32.o
else
obj-y += imx8mp_dhcom_pdk2.o

6
board/dhelectronics/dh_stm32mp1/board.c
View File

@ -260,13 +260,13 @@ int board_stm32mp1_ddr_config_name_match(struct udevice *dev,
void board_vddcore_init(u32 voltage_mv)
{
if (IS_ENABLED(CONFIG_SPL_BUILD))
if (IS_ENABLED(CONFIG_XPL_BUILD))
opp_voltage_mv = voltage_mv;
}
int board_early_init_f(void)
{
if (IS_ENABLED(CONFIG_SPL_BUILD))
if (IS_ENABLED(CONFIG_XPL_BUILD))
stpmic1_init(opp_voltage_mv);
board_get_coding_straps();
@ -767,7 +767,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
}
#endif
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_XPL_BUILD)
void spl_perform_fixups(struct spl_image_info *spl_image)
{
dh_stm32_ks8851_fixup(spl_image_fdt_addr(spl_image));

2
board/ea/mx7ulp_com/mx7ulp_com.c
View File

@ -52,7 +52,7 @@ int board_init(void)
return 0;
}
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
#include <spl.h>
#ifdef CONFIG_SPL_LOAD_FIT

2
board/eets/pdu001/board.c
View File

@ -65,7 +65,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define CFG_SYS_RTC_SCRATCH0 0x60
#define BOOT_DEVICE_SAVE_REGISTER (RTC_BASE + CFG_SYS_RTC_SCRATCH0)
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
static void save_boot_device(void)
{
*((u32 *)(BOOT_DEVICE_SAVE_REGISTER)) = spl_boot_device();

2
board/embest/mx6boards/mx6boards.c
View File

@ -394,7 +394,7 @@ int checkboard(void)
return 0;
}
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
#include <spl.h>
void board_init_f(ulong dummy)

2
board/engicam/common/Makefile
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
# Copyright (C) 2016 Amarula Solutions B.V.
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-$(CONFIG_IMX6_ENGICAM_COMMON) += spl.o
else
obj-$(CONFIG_IMX6_ENGICAM_COMMON) += board.o

2
board/engicam/imx8mm/Makefile
View File

@ -6,7 +6,7 @@
obj-y += icore_mx8mm.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
obj-y += lpddr4_timing.o
endif

2
board/engicam/imx8mp/Makefile
View File

@ -6,7 +6,7 @@
obj-y += icore_mx8mp.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
endif

2
board/engicam/stm32mp1/Makefile
View File

@ -3,7 +3,7 @@
# Copyright (C) 2018, STMicroelectronics - All Rights Reserved
#
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
else
obj-y += stm32mp1.o

2
board/firefly/firefly-rk3288/firefly-rk3288.c
View File

@ -9,7 +9,7 @@
#include <asm/global_data.h>
#include <dm/ofnode.h>
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
static int setup_led(void)
{
#ifdef CONFIG_SPL_LED

2
board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
View File

@ -13,7 +13,7 @@
#include <asm/arch-rockchip/gpio.h>
#include <asm/arch-rockchip/grf_rk3399.h>
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
#define PMUGRF_BASE 0xff320000
#define GPIO0_BASE 0xff720000

6
board/freescale/common/Makefile
View File

@ -5,7 +5,7 @@
MINIMAL=
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
ifndef CONFIG_TPL_BUILD
ifdef CONFIG_SPL_INIT_MINIMAL
MINIMAL=y
@ -29,14 +29,14 @@ endif
obj-$(CONFIG_FSL_CADMUS) += cadmus.o
obj-$(CONFIG_FSL_VIA) += cds_via.o
obj-$(CONFIG_FMAN_ENET) += fman.o
ifndef CONFIG_SPL_BUILD
ifndef CONFIG_XPL_BUILD
obj-$(CONFIG_FSL_NGPIXIS) += ngpixis.o
endif
obj-$(I2C_COMMON) += i2c_common.o
obj-$(CONFIG_FSL_USE_PCA9547_MUX) += i2c_mux.o
obj-$(CONFIG_$(SPL_)VID) += vid.o
obj-$(CONFIG_FSL_QIXIS) += qixis.o
ifndef CONFIG_SPL_BUILD
ifndef CONFIG_XPL_BUILD
obj-$(CONFIG_ID_EEPROM) += sys_eeprom.o
endif
ifndef CONFIG_RAMBOOT_PBL

2
board/freescale/common/cmd_esbc_validate.c
View File

@ -23,7 +23,7 @@ loop:
return 0;
}
#ifndef CONFIG_SPL_BUILD
#ifndef CONFIG_XPL_BUILD
static int do_esbc_validate(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{

8
board/freescale/common/fsl_chain_of_trust.c
View File

@ -15,7 +15,7 @@
#include <dm/root.h>
#include <asm/fsl_secure_boot.h>
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_FRAMEWORK)
#if defined(CONFIG_XPL_BUILD) && defined(CONFIG_SPL_FRAMEWORK)
#include <spl.h>
#endif
@ -67,7 +67,7 @@ int fsl_check_boot_mode_secure(void)
return 0;
}
#ifndef CONFIG_SPL_BUILD
#ifndef CONFIG_XPL_BUILD
int fsl_setenv_chain_of_trust(void)
{
/* Check Boot Mode
@ -92,7 +92,7 @@ int fsl_setenv_chain_of_trust(void)
}
#endif
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
void spl_validate_uboot(uint32_t hdr_addr, uintptr_t img_addr)
{
int res;
@ -157,4 +157,4 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
image_entry();
}
#endif /* ifdef CONFIG_SPL_FRAMEWORK */
#endif /* ifdef CONFIG_SPL_BUILD */
#endif /* ifdef CONFIG_XPL_BUILD */

4
board/freescale/common/fsl_validate.c
View File

@ -396,7 +396,7 @@ static void fsl_secboot_bootscript_parse_failure(void)
*/
void fsl_secboot_handle_error(int error)
{
#ifndef CONFIG_SPL_BUILD
#ifndef CONFIG_XPL_BUILD
const struct fsl_secboot_errcode *e;
for (e = fsl_secboot_errcodes; e->errcode != ERROR_ESBC_CLIENT_MAX;
@ -807,7 +807,7 @@ static int calculate_cmp_img_sig(struct fsl_secboot_img_priv *img)
prop.num_bits = key_len * 8;
prop.exp_len = key_len;
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_XPL_BUILD)
ret = device_bind_driver(NULL, "fsl_rsa_mod_exp", "fsl_rsa_mod_exp", NULL);
if (ret) {
printf("Couldn't bind fsl_rsa_mod_exp driver (%d)\n", ret);

2
board/freescale/common/qixis.c
View File

@ -161,7 +161,7 @@ void board_deassert_mem_reset(void)
}
#endif
#ifndef CONFIG_SPL_BUILD
#ifndef CONFIG_XPL_BUILD
static void qixis_reset(void)
{
QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET);

2
board/freescale/imx8mm_evk/Makefile
View File

@ -6,7 +6,7 @@
obj-y += imx8mm_evk.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
endif

2
board/freescale/imx8mn_evk/Makefile
View File

@ -6,7 +6,7 @@
obj-y += imx8mn_evk.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing_ld.o

2
board/freescale/imx8mp_evk/Makefile
View File

@ -6,7 +6,7 @@
obj-y += imx8mp_evk.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
endif

2
board/freescale/imx8mq_evk/Makefile
View File

@ -6,7 +6,7 @@
obj-y += imx8mq_evk.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o lpddr4_timing_b0.o
endif

2
board/freescale/imx8qm_mek/Makefile
View File

@ -5,4 +5,4 @@
#
obj-y += imx8qm_mek.o
obj-$(CONFIG_SPL_BUILD) += spl.o
obj-$(CONFIG_XPL_BUILD) += spl.o

2
board/freescale/imx8qxp_mek/Makefile
View File

@ -5,4 +5,4 @@
#
obj-y += imx8qxp_mek.o
obj-$(CONFIG_SPL_BUILD) += spl.o
obj-$(CONFIG_XPL_BUILD) += spl.o

2
board/freescale/imx8ulp_evk/Makefile
View File

@ -2,7 +2,7 @@
obj-y += imx8ulp_evk.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
ifdef CONFIG_IMX8ULP_ND_MODE
obj-y += lpddr4_timing_264.o

2
board/freescale/imx93_evk/Makefile
View File

@ -6,7 +6,7 @@
obj-y += imx93_evk.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_XPL_BUILD
obj-y += spl.o
obj-$(CONFIG_IMX93_EVK_LPDDR4X) += lpddr4x_timing.o lpddr4x_timing_1866mts.o
endif

2
board/freescale/imxrt1020-evk/imxrt1020-evk.c
View File

@ -37,7 +37,7 @@ int dram_init_banksize(void)
return fdtdec_setup_memory_banksize();
}
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)
{

2
board/freescale/imxrt1050-evk/imxrt1050-evk.c
View File

@ -37,7 +37,7 @@ int dram_init_banksize(void)
return fdtdec_setup_memory_banksize();
}
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)
{

2
board/freescale/imxrt1170-evk/imxrt1170-evk.c
View File

@ -37,7 +37,7 @@ int dram_init_banksize(void)
return fdtdec_setup_memory_banksize();
}
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)
{

2
board/freescale/ls1012afrdm/ls1012afrdm.c
View File

@ -140,7 +140,7 @@ int dram_init(void)
#endif
mmdc_init(&mparam);
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
#if !defined(CONFIG_SPL) || defined(CONFIG_XPL_BUILD)
/* This will break-before-make MMU for DDR */
update_early_mmu_table();
#endif

2
board/freescale/ls1012aqds/ls1012aqds.c
View File

@ -88,7 +88,7 @@ int dram_init(void)
mmdc_init(&mparam);
gd->ram_size = CFG_SYS_SDRAM_SIZE;
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
#if !defined(CONFIG_SPL) || defined(CONFIG_XPL_BUILD)
/* This will break-before-make MMU for DDR */
update_early_mmu_table();
#endif

2
board/freescale/ls1012ardb/ls1012ardb.c
View File

@ -138,7 +138,7 @@ int dram_init(void)
#endif
gd->ram_size = CFG_SYS_SDRAM_SIZE;
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
#if !defined(CONFIG_SPL) || defined(CONFIG_XPL_BUILD)
/* This will break-before-make MMU for DDR */
update_early_mmu_table();
#endif

4
board/freescale/ls1021aiot/ls1021aiot.c
View File

@ -99,7 +99,7 @@ void ddrmc_init(void)
int dram_init(void)
{
#if (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
#if (!defined(CONFIG_SPL) || defined(CONFIG_XPL_BUILD))
ddrmc_init();
#endif
@ -125,7 +125,7 @@ int board_early_init_f(void)
return 0;
}
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
void board_init_f(ulong dummy)
{
/* Clear the BSS */

4
board/freescale/ls1021aqds/ddr.c
View File

@ -172,14 +172,14 @@ int fsl_initdram(void)
{
phys_size_t dram_size;
#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL)
#if defined(CONFIG_XPL_BUILD) || !defined(CONFIG_SPL)
puts("Initializing DDR....using SPD\n");
dram_size = fsl_ddr_sdram();
#else
dram_size = fsl_ddr_sdram_size();
#endif
#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_XPL_BUILD)
fsl_dp_resume();
#endif

2
board/freescale/ls1021aqds/ls1021aqds.c
View File

@ -181,7 +181,7 @@ int board_early_init_f(void)
return 0;
}
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
void board_init_f(ulong dummy)
{
#ifdef CONFIG_NAND_BOOT

10
board/freescale/ls1021atsn/ls1021atsn.c
View File

@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
static void ddrmc_init(void)
{
#if (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
#if (!defined(CONFIG_SPL) || defined(CONFIG_XPL_BUILD))
struct ccsr_ddr *ddr = (struct ccsr_ddr *)CFG_SYS_FSL_DDR_ADDR;
u32 temp_sdram_cfg, tmp;
@ -105,7 +105,7 @@ static void ddrmc_init(void)
out_be32(&ddr->sdram_cfg_2, temp_sdram_cfg);
}
#endif
#endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */
#endif /* !defined(CONFIG_SPL) || defined(CONFIG_XPL_BUILD) */
}
int dram_init(void)
@ -116,7 +116,7 @@ int dram_init(void)
gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_XPL_BUILD)
fsl_dp_resume();
#endif
@ -156,7 +156,7 @@ int board_early_init_f(void)
return 0;
}
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
void board_init_f(ulong dummy)
{
void (*second_uboot)(void);
@ -214,7 +214,7 @@ int board_init(void)
return 0;
}
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_XPL_BUILD)
void spl_board_init(void)
{
ls102xa_smmu_stream_id_init();

10
board/freescale/ls1021atwr/ls1021atwr.c
View File

@ -224,7 +224,7 @@ void ddrmc_init(void)
int dram_init(void)
{
#if (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
#if (!defined(CONFIG_SPL) || defined(CONFIG_XPL_BUILD))
ddrmc_init();
#endif
@ -232,7 +232,7 @@ int dram_init(void)
gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_XPL_BUILD)
fsl_dp_resume();
#endif
@ -407,7 +407,7 @@ int board_early_init_f(void)
return 0;
}
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
void board_init_f(ulong dummy)
{
void (*second_uboot)(void);
@ -527,7 +527,7 @@ int board_init(void)
return 0;
}
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_XPL_BUILD)
void spl_board_init(void)
{
if (IS_ENABLED(CONFIG_FSL_CAAM)) {
@ -607,7 +607,7 @@ u16 flash_read16(void *addr)
}
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) \
&& !defined(CONFIG_SPL_BUILD)
&& !defined(CONFIG_XPL_BUILD)
static void convert_flash_bank(char bank)
{
struct cpld_data *cpld_data = (void *)(CFG_SYS_CPLD_BASE);

2
board/freescale/ls1028a/ls1028a.c
View File

@ -123,7 +123,7 @@ int board_early_init_f(void)
u8 uart;
#endif
#if defined(CONFIG_SYS_I2C_EARLY_INIT) && defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_SYS_I2C_EARLY_INIT) && defined(CONFIG_XPL_BUILD)
i2c_early_init_f();
#endif

2
board/freescale/ls1043aqds/Makefile
View File

@ -5,7 +5,7 @@
#
obj-y += ddr.o
ifndef CONFIG_SPL_BUILD
ifndef CONFIG_XPL_BUILD
obj-y += eth.o
endif
obj-y += ls1043aqds.o

2
board/freescale/ls1043aqds/ddr.c
View File

@ -123,7 +123,7 @@ int fsl_initdram(void)
{
phys_size_t dram_size;
#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_SPL) && !defined(CONFIG_XPL_BUILD)
gd->ram_size = fsl_ddr_sdram_size();
return 0;

2
board/freescale/ls1043aqds/ls1043aqds.c
View File

@ -288,7 +288,7 @@ int dram_init(void)
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
fsl_initdram();
#if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \
defined(CONFIG_SPL_BUILD)
defined(CONFIG_XPL_BUILD)
/* This will break-before-make MMU for DDR */
update_early_mmu_table();
#endif

2
board/freescale/ls1043ardb/Makefile
View File

@ -4,7 +4,7 @@
obj-y += ddr.o
obj-y += ls1043ardb.o
ifndef CONFIG_SPL_BUILD
ifndef CONFIG_XPL_BUILD
obj-$(CONFIG_NET) += eth.o
obj-y += cpld.o
endif

4
board/freescale/ls1043ardb/ddr.c
View File

@ -225,14 +225,14 @@ int fsl_initdram(void)
phys_size_t dram_size;
#ifdef CONFIG_SYS_DDR_RAW_TIMING
#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL)
#if defined(CONFIG_XPL_BUILD) || !defined(CONFIG_SPL)
puts("Initializing DDR....\n");
dram_size = fsl_ddr_sdram();
#else
dram_size = fsl_ddr_sdram_size();
#endif
#else
#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL)
#if defined(CONFIG_XPL_BUILD) || !defined(CONFIG_SPL)
puts("Initialzing DDR using fixed setting\n");
dram_size = fixed_sdram();
#else

2
board/freescale/ls1043ardb/ls1043ardb.c
View File

@ -132,7 +132,7 @@ int board_early_init_f(void)
return 0;
}
#ifndef CONFIG_SPL_BUILD
#ifndef CONFIG_XPL_BUILD
int checkboard(void)
{

Some files were not shown because too many files have changed in this diff Show More