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powerpc/ppc4xx: Add support for iocon-2
Add a new iocon flavor with a second communiction port per channel. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
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@ -30,6 +30,8 @@ DECLARE_GLOBAL_DATA_PTR;
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#define LATCH1_BASE (CONFIG_SYS_LATCH_BASE + 0x100)
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#define LATCH2_BASE (CONFIG_SYS_LATCH_BASE + 0x200)
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#define MAX_MUX_CHANNELS 2
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enum {
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UNITTYPE_MAIN_SERVER = 0,
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UNITTYPE_MAIN_USER = 1,
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@ -163,7 +165,7 @@ int checkboard(void)
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return 0;
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}
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static void print_fpga_info(unsigned int fpga)
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static void print_fpga_info(unsigned int fpga, bool rgmii2_present)
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{
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u16 versions;
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u16 fpga_version;
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@ -260,6 +262,8 @@ static void print_fpga_info(unsigned int fpga)
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hardware_version);
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break;
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}
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if (rgmii2_present)
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printf(" RGMII2,");
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}
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if (unit_type == UNITTYPE_VIDEO_USER) {
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@ -362,14 +366,19 @@ int last_stage_init(void)
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{
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int slaves;
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unsigned int k;
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unsigned int mux_ch;
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unsigned char mclink_controllers[] = { 0x24, 0x25, 0x26 };
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int legacy = get_fpga_state(0) & FPGA_STATE_PLATFORM;
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u16 fpga_features;
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int feature_carrier_speed = fpga_features & (1<<4);
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bool ch0_rgmii2_present = false;
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FPGA_GET_REG(0, fpga_features, &fpga_features);
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print_fpga_info(0);
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if (!legacy)
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ch0_rgmii2_present = !pca9698_get_value(0x20, 30);
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print_fpga_info(0, ch0_rgmii2_present);
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osd_probe(0);
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/* wait for FPGA done */
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@ -392,10 +401,15 @@ int last_stage_init(void)
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if (!legacy && (feature_carrier_speed == CARRIER_SPEED_1G)) {
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miiphy_register(bb_miiphy_buses[0].name, bb_miiphy_read,
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bb_miiphy_write);
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if (!verify_88e1518(bb_miiphy_buses[0].name, 0)) {
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printf("Fixup 88e1518 erratum on %s\n",
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bb_miiphy_buses[0].name);
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setup_88e1518(bb_miiphy_buses[0].name, 0);
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for (mux_ch = 0; mux_ch < MAX_MUX_CHANNELS; ++mux_ch) {
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if ((mux_ch == 1) && !ch0_rgmii2_present)
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continue;
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if (!verify_88e1518(bb_miiphy_buses[0].name, mux_ch)) {
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printf("Fixup 88e1518 erratum on %s phy %u\n",
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bb_miiphy_buses[0].name, mux_ch);
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setup_88e1518(bb_miiphy_buses[0].name, mux_ch);
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}
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}
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}
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@ -415,7 +429,7 @@ int last_stage_init(void)
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FPGA_GET_REG(k, fpga_features, &fpga_features);
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feature_carrier_speed = fpga_features & (1<<4);
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print_fpga_info(k);
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print_fpga_info(k, false);
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osd_probe(k);
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if (feature_carrier_speed == CARRIER_SPEED_1G) {
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miiphy_register(bb_miiphy_buses[k].name,
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@ -590,7 +604,7 @@ static int mii_delay(struct bb_miiphy_bus *bus)
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struct bb_miiphy_bus bb_miiphy_buses[] = {
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{
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.name = "trans1",
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.name = "board0",
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.init = mii_dummy_init,
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.mdio_active = mii_mdio_active,
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.mdio_tristate = mii_mdio_tristate,
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@ -601,7 +615,7 @@ struct bb_miiphy_bus bb_miiphy_buses[] = {
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.priv = &fpga_mii[0],
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},
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{
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.name = "trans2",
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.name = "board1",
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.init = mii_dummy_init,
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.mdio_active = mii_mdio_active,
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.mdio_tristate = mii_mdio_tristate,
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@ -612,7 +626,7 @@ struct bb_miiphy_bus bb_miiphy_buses[] = {
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.priv = &fpga_mii[1],
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},
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{
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.name = "trans3",
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.name = "board2",
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.init = mii_dummy_init,
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.mdio_active = mii_mdio_active,
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.mdio_tristate = mii_mdio_tristate,
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@ -623,7 +637,7 @@ struct bb_miiphy_bus bb_miiphy_buses[] = {
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.priv = &fpga_mii[2],
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},
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{
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.name = "trans4",
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.name = "board3",
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.init = mii_dummy_init,
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.mdio_active = mii_mdio_active,
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.mdio_tristate = mii_mdio_tristate,
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