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sunxi: Add support for UART0 in PB pin group on A83T
On A83T, PB9,PB10 are UART0 pins. On allwinner A83T Dev board(h8homlet), this uart0 serial connector is exposed. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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@ -76,6 +76,10 @@ static int gpio_init(void)
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sunxi_gpio_set_cfgpin(SUNXI_GPA(4), SUN8I_H3_GPA_UART0);
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sunxi_gpio_set_cfgpin(SUNXI_GPA(5), SUN8I_H3_GPA_UART0);
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sunxi_gpio_set_pull(SUNXI_GPA(5), SUNXI_GPIO_PULL_UP);
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#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_A83T)
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sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_A83T_GPB_UART0);
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sunxi_gpio_set_cfgpin(SUNXI_GPB(10), SUN8I_A83T_GPB_UART0);
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sunxi_gpio_set_pull(SUNXI_GPB(10), SUNXI_GPIO_PULL_UP);
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#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN9I)
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sunxi_gpio_set_cfgpin(SUNXI_GPH(12), SUN9I_GPH_UART0);
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sunxi_gpio_set_cfgpin(SUNXI_GPH(13), SUN9I_GPH_UART0);
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@ -158,6 +158,7 @@ enum sunxi_gpio_number {
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#define SUN5I_GPB_UART0 2
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#define SUN8I_GPB_UART2 2
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#define SUN8I_A33_GPB_UART0 3
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#define SUN8I_A83T_GPB_UART0 2
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#define SUNXI_GPC_NAND 2
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#define SUNXI_GPC_SDC2 3
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