mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-24 12:44:23 +08:00
net: emaclite: Move driver to DM
Move driver to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
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4d2749be62
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d538ee1b54
@ -12,7 +12,6 @@
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#include <common.h>
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#include <config.h>
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#include <fdtdec.h>
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#include <netdev.h>
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#include <asm/processor.h>
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#include <asm/microblaze_intc.h>
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#include <asm/asm.h>
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@ -100,23 +99,3 @@ void board_init(void)
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{
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gpio_init();
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}
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int board_eth_init(bd_t *bis)
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{
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int ret = 0;
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#if defined(CONFIG_XILINX_EMACLITE) && defined(XILINX_EMACLITE_BASEADDR)
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u32 txpp = 0;
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u32 rxpp = 0;
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# ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
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txpp = 1;
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# endif
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# ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
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rxpp = 1;
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# endif
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ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
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txpp, rxpp);
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#endif
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return ret;
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}
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@ -8,7 +8,6 @@
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#include <fdtdec.h>
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#include <fpga.h>
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#include <mmc.h>
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#include <netdev.h>
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#include <zynqpl.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/sys_proto.h>
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@ -99,25 +98,6 @@ int checkboard(void)
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}
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#endif
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int board_eth_init(bd_t *bis)
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{
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u32 ret = 0;
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#ifdef CONFIG_XILINX_EMACLITE
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u32 txpp = 0;
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u32 rxpp = 0;
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# ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
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txpp = 1;
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# endif
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# ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
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rxpp = 1;
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# endif
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ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
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txpp, rxpp);
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#endif
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return ret;
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}
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int dram_init(void)
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{
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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@ -10,6 +10,7 @@ CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_EMBED=y
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CONFIG_DM_ETH=y
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CONFIG_PHYLIB=y
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CONFIG_SYS_NS16550=y
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CONFIG_XILINX_UARTLITE=y
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@ -10,6 +10,7 @@
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#include <common.h>
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#include <net.h>
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#include <config.h>
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#include <dm.h>
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#include <console.h>
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#include <malloc.h>
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#include <asm/io.h>
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@ -19,7 +20,7 @@
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#include <asm-generic/errno.h>
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#include <linux/kernel.h>
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#undef DEBUG
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DECLARE_GLOBAL_DATA_PTR;
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#define ENET_ADDR_LENGTH 6
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#define ETH_FCS_LEN 4 /* Octets in the FCS */
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@ -146,7 +147,6 @@ static void xemaclite_alignedwrite(void *srcptr, u32 *destptr, u32 bytecount)
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*to32ptr++ = alignbuffer;
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}
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#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
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static int wait_for_bit(const char *func, u32 *reg, const u32 mask,
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bool set, unsigned int timeout)
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{
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@ -231,9 +231,8 @@ static u32 phywrite(struct xemaclite *emaclite, u32 phyaddress, u32 registernum,
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return 0;
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}
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#endif
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static void emaclite_halt(struct eth_device *dev)
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static void emaclite_halt(struct udevice *dev)
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{
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debug("eth_halt\n");
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}
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@ -249,12 +248,11 @@ static void emaclite_halt(struct eth_device *dev)
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*/
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#define PHY_DETECT_MASK 0x1808
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#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
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static int setup_phy(struct eth_device *dev)
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static int setup_phy(struct udevice *dev)
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{
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int i;
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u16 phyreg;
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struct xemaclite *emaclite = dev->priv;
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struct xemaclite *emaclite = dev_get_priv(dev);
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struct phy_device *phydev;
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u32 supported = SUPPORTED_10baseT_Half |
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@ -314,11 +312,11 @@ static int setup_phy(struct eth_device *dev)
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/* Do not setup anything */
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return 1;
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}
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#endif
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static int emaclite_init(struct eth_device *dev, bd_t *bis)
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static int emaclite_init(struct udevice *dev)
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{
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struct xemaclite *emaclite = dev->priv;
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struct xemaclite *emaclite = dev_get_priv(dev);
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struct eth_pdata *pdata = dev_get_platdata(dev);
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struct emaclite_regs *regs = emaclite->regs;
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debug("EmacLite Initialization Started\n");
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@ -329,7 +327,7 @@ static int emaclite_init(struct eth_device *dev, bd_t *bis)
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/* Restart PING TX */
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out_be32(®s->tx_ping_tsr, 0);
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/* Copy MAC address */
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xemaclite_alignedwrite(dev->enetaddr, ®s->tx_ping,
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xemaclite_alignedwrite(pdata->enetaddr, ®s->tx_ping,
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ENET_ADDR_LENGTH);
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/* Set the length */
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out_be32(®s->tx_ping_tplr, ENET_ADDR_LENGTH);
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@ -343,7 +341,7 @@ static int emaclite_init(struct eth_device *dev, bd_t *bis)
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if (emaclite->txpp) {
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/* The same operation with PONG TX */
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out_be32(®s->tx_pong_tsr, 0);
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xemaclite_alignedwrite(dev->enetaddr, ®s->tx_pong,
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xemaclite_alignedwrite(pdata->enetaddr, ®s->tx_pong,
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ENET_ADDR_LENGTH);
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out_be32(®s->tx_pong_tplr, ENET_ADDR_LENGTH);
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out_be32(®s->tx_pong_tsr, XEL_TSR_PROG_MAC_ADDR);
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@ -361,12 +359,11 @@ static int emaclite_init(struct eth_device *dev, bd_t *bis)
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if (emaclite->rxpp)
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out_be32(®s->rx_pong_rsr, XEL_RSR_RECV_IE_MASK);
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#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
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out_be32(®s->mdioctrl, XEL_MDIOCTRL_MDIOEN_MASK);
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if (in_be32(®s->mdioctrl) & XEL_MDIOCTRL_MDIOEN_MASK)
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if (!setup_phy(dev))
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return -1;
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#endif
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debug("EmacLite Initialization complete\n");
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return 0;
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}
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@ -387,10 +384,10 @@ static int xemaclite_txbufferavailable(struct xemaclite *emaclite)
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return !(tmp & XEL_TSR_XMIT_BUSY_MASK);
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}
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static int emaclite_send(struct eth_device *dev, void *ptr, int len)
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static int emaclite_send(struct udevice *dev, void *ptr, int len)
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{
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u32 reg;
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struct xemaclite *emaclite = dev->priv;
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struct xemaclite *emaclite = dev_get_priv(dev);
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struct emaclite_regs *regs = emaclite->regs;
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u32 maxtry = 1000;
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@ -448,7 +445,7 @@ static int emaclite_send(struct eth_device *dev, void *ptr, int len)
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return -1;
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}
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static int emaclite_recv(struct eth_device *dev)
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static int emaclite_recv(struct udevice *dev, int flags, uchar **packetp)
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{
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u32 length, first_read, reg, attempt = 0;
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void *addr, *ack;
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@ -532,78 +529,104 @@ try_again:
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debug("Packet receive from 0x%p, length %dB\n", addr, length);
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net_process_received_packet((uchar *)etherrxbuff, length);
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return length;
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return 0;
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}
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#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
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static int emaclite_miiphy_read(const char *devname, uchar addr,
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uchar reg, ushort *val)
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static int emaclite_miiphy_read(struct mii_dev *bus, int addr,
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int devad, int reg)
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{
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u32 ret;
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struct eth_device *dev = eth_get_dev();
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u16 val = 0;
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ret = phyread(dev->priv, addr, reg, val);
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debug("emaclite: Read MII 0x%x, 0x%x, 0x%x\n", addr, reg, *val);
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return ret;
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ret = phyread(bus->priv, addr, reg, &val);
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debug("emaclite: Read MII 0x%x, 0x%x, 0x%x, %d\n", addr, reg, val, ret);
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return val;
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}
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static int emaclite_miiphy_write(const char *devname, uchar addr,
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uchar reg, ushort val)
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static int emaclite_miiphy_write(struct mii_dev *bus, int addr, int devad,
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int reg, u16 value)
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{
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struct eth_device *dev = eth_get_dev();
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debug("emaclite: Write MII 0x%x, 0x%x, 0x%x\n", addr, reg, val);
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return phywrite(dev->priv, addr, reg, val);
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debug("emaclite: Write MII 0x%x, 0x%x, 0x%x\n", addr, reg, value);
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return phywrite(bus->priv, addr, reg, value);
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}
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#endif
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int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
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int txpp, int rxpp)
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static int emaclite_probe(struct udevice *dev)
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{
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struct eth_device *dev;
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struct xemaclite *emaclite;
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struct emaclite_regs *regs;
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struct xemaclite *emaclite = dev_get_priv(dev);
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int ret;
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dev = calloc(1, sizeof(*dev));
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if (dev == NULL)
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return -1;
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emaclite->bus = mdio_alloc();
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emaclite->bus->read = emaclite_miiphy_read;
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emaclite->bus->write = emaclite_miiphy_write;
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emaclite->bus->priv = emaclite;
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strcpy(emaclite->bus->name, "emaclite");
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emaclite = calloc(1, sizeof(struct xemaclite));
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if (emaclite == NULL) {
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free(dev);
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return -1;
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}
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ret = mdio_register(emaclite->bus);
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if (ret)
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return ret;
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dev->priv = emaclite;
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return 0;
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}
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emaclite->txpp = txpp;
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emaclite->rxpp = rxpp;
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static int emaclite_remove(struct udevice *dev)
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{
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struct xemaclite *emaclite = dev_get_priv(dev);
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sprintf(dev->name, "Xelite.%lx", base_addr);
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free(emaclite->phydev);
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mdio_unregister(emaclite->bus);
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mdio_free(emaclite->bus);
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emaclite->regs = (struct emaclite_regs *)base_addr;
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regs = emaclite->regs;
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dev->iobase = base_addr;
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dev->init = emaclite_init;
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dev->halt = emaclite_halt;
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dev->send = emaclite_send;
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dev->recv = emaclite_recv;
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return 0;
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}
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static const struct eth_ops emaclite_ops = {
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.start = emaclite_init,
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.send = emaclite_send,
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.recv = emaclite_recv,
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.stop = emaclite_halt,
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};
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static int emaclite_ofdata_to_platdata(struct udevice *dev)
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{
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struct eth_pdata *pdata = dev_get_platdata(dev);
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struct xemaclite *emaclite = dev_get_priv(dev);
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int offset = 0;
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pdata->iobase = (phys_addr_t)dev_get_addr(dev);
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emaclite->regs = (struct emaclite_regs *)pdata->iobase;
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#ifdef CONFIG_PHY_ADDR
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emaclite->phyaddr = CONFIG_PHY_ADDR;
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#else
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emaclite->phyaddr = -1;
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#endif
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eth_register(dev);
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offset = fdtdec_lookup_phandle(gd->fdt_blob, dev->of_offset,
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"phy-handle");
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if (offset > 0)
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emaclite->phyaddr = fdtdec_get_int(gd->fdt_blob, offset,
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"reg", -1);
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#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
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miiphy_register(dev->name, emaclite_miiphy_read, emaclite_miiphy_write);
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emaclite->bus = miiphy_get_dev_by_name(dev->name);
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emaclite->txpp = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
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"xlnx,tx-ping-pong", 0);
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emaclite->rxpp = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
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"xlnx,rx-ping-pong", 0);
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out_be32(®s->mdioctrl, XEL_MDIOCTRL_MDIOEN_MASK);
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#endif
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printf("EMACLITE: %lx, phyaddr %d, %d/%d\n", (ulong)emaclite->regs,
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emaclite->phyaddr, emaclite->txpp, emaclite->rxpp);
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return 1;
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return 0;
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}
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static const struct udevice_id emaclite_ids[] = {
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{ .compatible = "xlnx,xps-ethernetlite-1.00.a" },
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{ }
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};
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U_BOOT_DRIVER(emaclite) = {
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.name = "emaclite",
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.id = UCLASS_ETH,
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.of_match = emaclite_ids,
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.ofdata_to_platdata = emaclite_ofdata_to_platdata,
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.probe = emaclite_probe,
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.remove = emaclite_remove,
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.ops = &emaclite_ops,
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.priv_auto_alloc_size = sizeof(struct xemaclite),
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.platdata_auto_alloc_size = sizeof(struct eth_pdata),
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};
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@ -80,8 +80,6 @@ int tsi108_eth_initialize(bd_t *bis);
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int uec_standard_init(bd_t *bis);
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int uli526x_initialize(bd_t *bis);
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int armada100_fec_register(unsigned long base_addr);
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int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
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int txpp, int rxpp);
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int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
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unsigned long ctrl_addr);
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/*
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