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https://github.com/u-boot/u-boot.git
synced 2024-11-25 13:14:19 +08:00
mmc: add generic mmc spi driver
This patch supports mmc/sd card with spi interface. It is based on the generic mmc framework. It works with SDHC and supports multi blocks read/write. The crc checksum on data packet is enabled with the def, There is a subcomamnd "mmc_spi" to setup spi bus and cs at run time. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
parent
5f837c2c0e
commit
d52ebf1022
@ -118,6 +118,7 @@ COBJS-$(CONFIG_CMD_MII) += miiphyutil.o
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COBJS-$(CONFIG_CMD_MII) += cmd_mii.o
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COBJS-$(CONFIG_CMD_MISC) += cmd_misc.o
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COBJS-$(CONFIG_CMD_MMC) += cmd_mmc.o
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COBJS-$(CONFIG_CMD_MMC_SPI) += cmd_mmc_spi.o
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COBJS-$(CONFIG_MP) += cmd_mp.o
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COBJS-$(CONFIG_CMD_MTDPARTS) += cmd_mtdparts.o
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COBJS-$(CONFIG_CMD_NAND) += cmd_nand.o
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88
common/cmd_mmc_spi.c
Normal file
88
common/cmd_mmc_spi.c
Normal file
@ -0,0 +1,88 @@
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/*
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* Command for mmc_spi setup.
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*
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* Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
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* Licensed under the GPL-2 or later.
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*/
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#include <common.h>
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#include <mmc.h>
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#include <spi.h>
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#ifndef CONFIG_MMC_SPI_BUS
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# define CONFIG_MMC_SPI_BUS 0
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#endif
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#ifndef CONFIG_MMC_SPI_CS
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# define CONFIG_MMC_SPI_CS 1
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#endif
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/* in SPI mode, MMC speed limit is 20MHz, while SD speed limit is 25MHz */
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#ifndef CONFIG_MMC_SPI_SPEED
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# define CONFIG_MMC_SPI_SPEED 25000000
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#endif
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/* MMC and SD specs only seem to care that sampling is on the
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* rising edge ... meaning SPI modes 0 or 3. So either SPI mode
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* should be legit. We'll use mode 0 since the steady state is 0,
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* which is appropriate for hotplugging, unless the platform data
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* specify mode 3 (if hardware is not compatible to mode 0).
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*/
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#ifndef CONFIG_MMC_SPI_MODE
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# define CONFIG_MMC_SPI_MODE SPI_MODE_0
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#endif
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static int do_mmc_spi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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uint bus = CONFIG_MMC_SPI_BUS;
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uint cs = CONFIG_MMC_SPI_CS;
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uint speed = CONFIG_MMC_SPI_SPEED;
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uint mode = CONFIG_MMC_SPI_MODE;
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char *endp;
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struct mmc *mmc;
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if (argc < 2)
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goto usage;
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cs = simple_strtoul(argv[1], &endp, 0);
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if (*argv[1] == 0 || (*endp != 0 && *endp != ':'))
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goto usage;
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if (*endp == ':') {
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if (endp[1] == 0)
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goto usage;
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bus = cs;
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cs = simple_strtoul(endp + 1, &endp, 0);
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if (*endp != 0)
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goto usage;
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}
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if (argc >= 3) {
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speed = simple_strtoul(argv[2], &endp, 0);
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if (*argv[2] == 0 || *endp != 0)
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goto usage;
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}
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if (argc >= 4) {
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mode = simple_strtoul(argv[3], &endp, 16);
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if (*argv[3] == 0 || *endp != 0)
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goto usage;
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}
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if (!spi_cs_is_valid(bus, cs)) {
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printf("Invalid SPI bus %u cs %u\n", bus, cs);
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return 1;
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}
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mmc = mmc_spi_init(bus, cs, speed, mode);
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if (!mmc) {
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printf("Failed to create MMC Device\n");
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return 1;
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}
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printf("%s: %d at %u:%u hz %u mode %u\n", mmc->name, mmc->block_dev.dev,
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bus, cs, speed, mode);
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return 0;
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usage:
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cmd_usage(cmdtp);
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return 1;
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}
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U_BOOT_CMD(
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mmc_spi, 4, 0, do_mmc_spi,
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"mmc_spi setup",
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"[bus:]cs [hz] [mode] - setup mmc_spi device"
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);
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@ -31,6 +31,7 @@ COBJS-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
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COBJS-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
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COBJS-$(CONFIG_GENERIC_MMC) += mmc.o
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COBJS-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
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COBJS-$(CONFIG_MMC_SPI) += mmc_spi.o
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COBJS-$(CONFIG_MXC_MMC) += mxcmmc.o
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COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o
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COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
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@ -117,7 +117,10 @@ mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src)
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return 0;
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}
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if (blkcnt > 1) {
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/* SPI multiblock writes terminate using a special
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* token, not a STOP_TRANSMISSION request.
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*/
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if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
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cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
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cmd.cmdarg = 0;
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cmd.resp_type = MMC_RSP_R1b;
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@ -279,7 +282,8 @@ sd_send_op_cond(struct mmc *mmc)
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* how to manage low voltages SD card is not yet
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* specified.
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*/
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cmd.cmdarg = mmc->voltages & 0xff8000;
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cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
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(mmc->voltages & 0xff8000);
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if (mmc->version == SD_VERSION_2)
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cmd.cmdarg |= OCR_HCS;
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@ -298,6 +302,18 @@ sd_send_op_cond(struct mmc *mmc)
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if (mmc->version != SD_VERSION_2)
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mmc->version = SD_VERSION_1_0;
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if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
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cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
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cmd.resp_type = MMC_RSP_R3;
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cmd.cmdarg = 0;
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cmd.flags = 0;
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err = mmc_send_cmd(mmc, &cmd, NULL);
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if (err)
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return err;
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}
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mmc->ocr = cmd.response[0];
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mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
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@ -318,7 +334,8 @@ int mmc_send_op_cond(struct mmc *mmc)
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do {
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cmd.cmdidx = MMC_CMD_SEND_OP_COND;
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cmd.resp_type = MMC_RSP_R3;
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cmd.cmdarg = OCR_HCS | mmc->voltages;
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cmd.cmdarg = OCR_HCS | (mmc_host_is_spi(mmc) ? 0 :
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mmc->voltages);
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cmd.flags = 0;
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err = mmc_send_cmd(mmc, &cmd, NULL);
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@ -332,6 +349,18 @@ int mmc_send_op_cond(struct mmc *mmc)
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if (timeout <= 0)
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return UNUSABLE_ERR;
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if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
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cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
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cmd.resp_type = MMC_RSP_R3;
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cmd.cmdarg = 0;
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cmd.flags = 0;
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err = mmc_send_cmd(mmc, &cmd, NULL);
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if (err)
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return err;
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}
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mmc->version = MMC_VERSION_UNKNOWN;
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mmc->ocr = cmd.response[0];
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@ -387,6 +416,9 @@ int mmc_change_freq(struct mmc *mmc)
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mmc->card_caps = 0;
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if (mmc_host_is_spi(mmc))
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return 0;
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/* Only version 4 supports high-speed */
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if (mmc->version < MMC_VERSION_4)
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return 0;
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@ -460,6 +492,9 @@ int sd_change_freq(struct mmc *mmc)
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mmc->card_caps = 0;
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if (mmc_host_is_spi(mmc))
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return 0;
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/* Read the SCR to find out if this card supports higher speeds */
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cmd.cmdidx = MMC_CMD_APP_CMD;
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cmd.resp_type = MMC_RSP_R1;
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@ -610,8 +645,22 @@ int mmc_startup(struct mmc *mmc)
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struct mmc_cmd cmd;
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char ext_csd[512];
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#ifdef CONFIG_MMC_SPI_CRC_ON
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if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
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cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
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cmd.resp_type = MMC_RSP_R1;
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cmd.cmdarg = 1;
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cmd.flags = 0;
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err = mmc_send_cmd(mmc, &cmd, NULL);
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if (err)
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return err;
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}
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#endif
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/* Put the Card in Identify Mode */
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cmd.cmdidx = MMC_CMD_ALL_SEND_CID;
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cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
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MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
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cmd.resp_type = MMC_RSP_R2;
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cmd.cmdarg = 0;
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cmd.flags = 0;
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@ -628,18 +677,20 @@ int mmc_startup(struct mmc *mmc)
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* For SD cards, get the Relatvie Address.
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* This also puts the cards into Standby State
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*/
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cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
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cmd.cmdarg = mmc->rca << 16;
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cmd.resp_type = MMC_RSP_R6;
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cmd.flags = 0;
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if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
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cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
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cmd.cmdarg = mmc->rca << 16;
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cmd.resp_type = MMC_RSP_R6;
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cmd.flags = 0;
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err = mmc_send_cmd(mmc, &cmd, NULL);
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err = mmc_send_cmd(mmc, &cmd, NULL);
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if (err)
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return err;
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if (err)
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return err;
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if (IS_SD(mmc))
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mmc->rca = (cmd.response[0] >> 16) & 0xffff;
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if (IS_SD(mmc))
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mmc->rca = (cmd.response[0] >> 16) & 0xffff;
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}
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/* Get the Card-Specific Data */
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cmd.cmdidx = MMC_CMD_SEND_CSD;
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@ -715,14 +766,16 @@ int mmc_startup(struct mmc *mmc)
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mmc->write_bl_len = 512;
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/* Select the card, and put it into Transfer Mode */
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cmd.cmdidx = MMC_CMD_SELECT_CARD;
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cmd.resp_type = MMC_RSP_R1b;
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cmd.cmdarg = mmc->rca << 16;
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cmd.flags = 0;
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err = mmc_send_cmd(mmc, &cmd, NULL);
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if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
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cmd.cmdidx = MMC_CMD_SELECT_CARD;
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cmd.resp_type = MMC_RSP_R1b;
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cmd.cmdarg = mmc->rca << 16;
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cmd.flags = 0;
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err = mmc_send_cmd(mmc, &cmd, NULL);
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if (err)
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return err;
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if (err)
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return err;
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}
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if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
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/* check ext_csd version and capacity */
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280
drivers/mmc/mmc_spi.c
Normal file
280
drivers/mmc/mmc_spi.c
Normal file
@ -0,0 +1,280 @@
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/*
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* generic mmc spi driver
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*
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* Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
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* Licensed under the GPL-2 or later.
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*/
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#include <common.h>
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#include <malloc.h>
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#include <part.h>
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#include <mmc.h>
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#include <spi.h>
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#include <crc.h>
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#include <linux/crc7.h>
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#include <linux/byteorder/swab.h>
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/* MMC/SD in SPI mode reports R1 status always */
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#define R1_SPI_IDLE (1 << 0)
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#define R1_SPI_ERASE_RESET (1 << 1)
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#define R1_SPI_ILLEGAL_COMMAND (1 << 2)
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#define R1_SPI_COM_CRC (1 << 3)
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#define R1_SPI_ERASE_SEQ (1 << 4)
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#define R1_SPI_ADDRESS (1 << 5)
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#define R1_SPI_PARAMETER (1 << 6)
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/* R1 bit 7 is always zero, reuse this bit for error */
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#define R1_SPI_ERROR (1 << 7)
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/* Response tokens used to ack each block written: */
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#define SPI_MMC_RESPONSE_CODE(x) ((x) & 0x1f)
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#define SPI_RESPONSE_ACCEPTED ((2 << 1)|1)
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#define SPI_RESPONSE_CRC_ERR ((5 << 1)|1)
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#define SPI_RESPONSE_WRITE_ERR ((6 << 1)|1)
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/* Read and write blocks start with these tokens and end with crc;
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* on error, read tokens act like a subset of R2_SPI_* values.
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*/
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#define SPI_TOKEN_SINGLE 0xfe /* single block r/w, multiblock read */
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#define SPI_TOKEN_MULTI_WRITE 0xfc /* multiblock write */
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#define SPI_TOKEN_STOP_TRAN 0xfd /* terminate multiblock write */
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/* MMC SPI commands start with a start bit "0" and a transmit bit "1" */
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#define MMC_SPI_CMD(x) (0x40 | (x & 0x3f))
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/* bus capability */
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#define MMC_SPI_VOLTAGE (MMC_VDD_32_33 | MMC_VDD_33_34)
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#define MMC_SPI_MIN_CLOCK 400000 /* 400KHz to meet MMC spec */
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/* timeout value */
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#define CTOUT 8
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#define RTOUT 3000000 /* 1 sec */
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#define WTOUT 3000000 /* 1 sec */
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static uint mmc_spi_sendcmd(struct mmc *mmc, ushort cmdidx, u32 cmdarg)
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{
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struct spi_slave *spi = mmc->priv;
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u8 cmdo[7];
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u8 r1;
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int i;
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cmdo[0] = 0xff;
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cmdo[1] = MMC_SPI_CMD(cmdidx);
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cmdo[2] = cmdarg >> 24;
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cmdo[3] = cmdarg >> 16;
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cmdo[4] = cmdarg >> 8;
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cmdo[5] = cmdarg;
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cmdo[6] = (crc7(0, &cmdo[1], 5) << 1) | 0x01;
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spi_xfer(spi, sizeof(cmdo) * 8, cmdo, NULL, 0);
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for (i = 0; i < CTOUT; i++) {
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spi_xfer(spi, 1 * 8, NULL, &r1, 0);
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if (i && (r1 & 0x80) == 0) /* r1 response */
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break;
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}
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debug("%s:cmd%d resp%d %x\n", __func__, cmdidx, i, r1);
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return r1;
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}
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static uint mmc_spi_readdata(struct mmc *mmc, void *xbuf,
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u32 bcnt, u32 bsize)
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{
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struct spi_slave *spi = mmc->priv;
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u8 *buf = xbuf;
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u8 r1;
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u16 crc;
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int i;
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while (bcnt--) {
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for (i = 0; i < RTOUT; i++) {
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spi_xfer(spi, 1 * 8, NULL, &r1, 0);
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if (r1 != 0xff) /* data token */
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break;
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}
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debug("%s:tok%d %x\n", __func__, i, r1);
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if (r1 == SPI_TOKEN_SINGLE) {
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spi_xfer(spi, bsize * 8, NULL, buf, 0);
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spi_xfer(spi, 2 * 8, NULL, &crc, 0);
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#ifdef CONFIG_MMC_SPI_CRC_ON
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if (swab16(cyg_crc16(buf, bsize)) != crc) {
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debug("%s: CRC error\n", mmc->name);
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r1 = R1_SPI_COM_CRC;
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break;
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}
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#endif
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r1 = 0;
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} else {
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r1 = R1_SPI_ERROR;
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break;
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}
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buf += bsize;
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}
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return r1;
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}
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static uint mmc_spi_writedata(struct mmc *mmc, const void *xbuf,
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u32 bcnt, u32 bsize, int multi)
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{
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struct spi_slave *spi = mmc->priv;
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const u8 *buf = xbuf;
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u8 r1;
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u16 crc;
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u8 tok[2];
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int i;
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tok[0] = 0xff;
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tok[1] = multi ? SPI_TOKEN_MULTI_WRITE : SPI_TOKEN_SINGLE;
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while (bcnt--) {
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#ifdef CONFIG_MMC_SPI_CRC_ON
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crc = swab16(cyg_crc16((u8 *)buf, bsize));
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#endif
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spi_xfer(spi, 2 * 8, tok, NULL, 0);
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spi_xfer(spi, bsize * 8, buf, NULL, 0);
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spi_xfer(spi, 2 * 8, &crc, NULL, 0);
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for (i = 0; i < CTOUT; i++) {
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spi_xfer(spi, 1 * 8, NULL, &r1, 0);
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if ((r1 & 0x10) == 0) /* response token */
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break;
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}
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debug("%s:tok%d %x\n", __func__, i, r1);
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if (SPI_MMC_RESPONSE_CODE(r1) == SPI_RESPONSE_ACCEPTED) {
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for (i = 0; i < WTOUT; i++) { /* wait busy */
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spi_xfer(spi, 1 * 8, NULL, &r1, 0);
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if (i && r1 == 0xff) {
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r1 = 0;
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break;
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}
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}
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if (i == WTOUT) {
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debug("%s:wtout %x\n", __func__, r1);
|
||||
r1 = R1_SPI_ERROR;
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
debug("%s: err %x\n", __func__, r1);
|
||||
r1 = R1_SPI_COM_CRC;
|
||||
break;
|
||||
}
|
||||
buf += bsize;
|
||||
}
|
||||
if (multi && bcnt == -1) { /* stop multi write */
|
||||
tok[1] = SPI_TOKEN_STOP_TRAN;
|
||||
spi_xfer(spi, 2 * 8, tok, NULL, 0);
|
||||
for (i = 0; i < WTOUT; i++) { /* wait busy */
|
||||
spi_xfer(spi, 1 * 8, NULL, &r1, 0);
|
||||
if (i && r1 == 0xff) {
|
||||
r1 = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (i == WTOUT) {
|
||||
debug("%s:wstop %x\n", __func__, r1);
|
||||
r1 = R1_SPI_ERROR;
|
||||
}
|
||||
}
|
||||
return r1;
|
||||
}
|
||||
|
||||
static int mmc_spi_request(struct mmc *mmc, struct mmc_cmd *cmd,
|
||||
struct mmc_data *data)
|
||||
{
|
||||
struct spi_slave *spi = mmc->priv;
|
||||
u8 r1;
|
||||
int i;
|
||||
int ret = 0;
|
||||
debug("%s:cmd%d %x %x %x\n", __func__,
|
||||
cmd->cmdidx, cmd->resp_type, cmd->cmdarg, cmd->flags);
|
||||
spi_claim_bus(spi);
|
||||
spi_cs_activate(spi);
|
||||
r1 = mmc_spi_sendcmd(mmc, cmd->cmdidx, cmd->cmdarg);
|
||||
if (r1 == 0xff) { /* no response */
|
||||
ret = NO_CARD_ERR;
|
||||
goto done;
|
||||
} else if (r1 & R1_SPI_COM_CRC) {
|
||||
ret = COMM_ERR;
|
||||
goto done;
|
||||
} else if (r1 & ~R1_SPI_IDLE) { /* other errors */
|
||||
ret = TIMEOUT;
|
||||
goto done;
|
||||
} else if (cmd->resp_type == MMC_RSP_R2) {
|
||||
r1 = mmc_spi_readdata(mmc, cmd->response, 1, 16);
|
||||
for (i = 0; i < 4; i++)
|
||||
cmd->response[i] = swab32(cmd->response[i]);
|
||||
debug("r128 %x %x %x %x\n", cmd->response[0], cmd->response[1],
|
||||
cmd->response[2], cmd->response[3]);
|
||||
} else if (!data) {
|
||||
switch (cmd->cmdidx) {
|
||||
case SD_CMD_APP_SEND_OP_COND:
|
||||
case MMC_CMD_SEND_OP_COND:
|
||||
cmd->response[0] = (r1 & R1_SPI_IDLE) ? 0 : OCR_BUSY;
|
||||
break;
|
||||
case SD_CMD_SEND_IF_COND:
|
||||
case MMC_CMD_SPI_READ_OCR:
|
||||
spi_xfer(spi, 4 * 8, NULL, cmd->response, 0);
|
||||
cmd->response[0] = swab32(cmd->response[0]);
|
||||
debug("r32 %x\n", cmd->response[0]);
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
debug("%s:data %x %x %x\n", __func__,
|
||||
data->flags, data->blocks, data->blocksize);
|
||||
if (data->flags == MMC_DATA_READ)
|
||||
r1 = mmc_spi_readdata(mmc, data->dest,
|
||||
data->blocks, data->blocksize);
|
||||
else if (data->flags == MMC_DATA_WRITE)
|
||||
r1 = mmc_spi_writedata(mmc, data->src,
|
||||
data->blocks, data->blocksize,
|
||||
(cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK));
|
||||
if (r1 & R1_SPI_COM_CRC)
|
||||
ret = COMM_ERR;
|
||||
else if (r1) /* other errors */
|
||||
ret = TIMEOUT;
|
||||
}
|
||||
done:
|
||||
spi_cs_deactivate(spi);
|
||||
spi_release_bus(spi);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void mmc_spi_set_ios(struct mmc *mmc)
|
||||
{
|
||||
struct spi_slave *spi = mmc->priv;
|
||||
debug("%s: clock %u\n", __func__, mmc->clock);
|
||||
if (mmc->clock)
|
||||
spi_set_speed(spi, mmc->clock);
|
||||
}
|
||||
|
||||
static int mmc_spi_init_p(struct mmc *mmc)
|
||||
{
|
||||
struct spi_slave *spi = mmc->priv;
|
||||
mmc->clock = 0;
|
||||
spi_set_speed(spi, MMC_SPI_MIN_CLOCK);
|
||||
spi_claim_bus(spi);
|
||||
/* cs deactivated for 100+ clock */
|
||||
spi_xfer(spi, 18 * 8, NULL, NULL, 0);
|
||||
spi_release_bus(spi);
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode)
|
||||
{
|
||||
struct mmc *mmc;
|
||||
|
||||
mmc = malloc(sizeof(*mmc));
|
||||
if (!mmc)
|
||||
return NULL;
|
||||
memset(mmc, 0, sizeof(*mmc));
|
||||
mmc->priv = spi_setup_slave(bus, cs, speed, mode);
|
||||
if (!mmc->priv) {
|
||||
free(mmc);
|
||||
return NULL;
|
||||
}
|
||||
sprintf(mmc->name, "MMC_SPI");
|
||||
mmc->send_cmd = mmc_spi_request;
|
||||
mmc->set_ios = mmc_spi_set_ios;
|
||||
mmc->init = mmc_spi_init_p;
|
||||
mmc->host_caps = MMC_MODE_SPI;
|
||||
|
||||
mmc->voltages = MMC_SPI_VOLTAGE;
|
||||
mmc->f_max = speed;
|
||||
mmc->f_min = MMC_SPI_MIN_CLOCK;
|
||||
mmc->block_dev.part_type = PART_TYPE_DOS;
|
||||
|
||||
mmc_register(mmc);
|
||||
|
||||
return mmc;
|
||||
}
|
@ -44,6 +44,7 @@
|
||||
#define MMC_MODE_HS_52MHz 0x010
|
||||
#define MMC_MODE_4BIT 0x100
|
||||
#define MMC_MODE_8BIT 0x200
|
||||
#define MMC_MODE_SPI 0x400
|
||||
|
||||
#define SD_DATA_4BIT 0x00040000
|
||||
|
||||
@ -75,6 +76,8 @@
|
||||
#define MMC_CMD_WRITE_SINGLE_BLOCK 24
|
||||
#define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
|
||||
#define MMC_CMD_APP_CMD 55
|
||||
#define MMC_CMD_SPI_READ_OCR 58
|
||||
#define MMC_CMD_SPI_CRC_ON_OFF 59
|
||||
|
||||
#define SD_CMD_SEND_RELATIVE_ADDR 3
|
||||
#define SD_CMD_SWITCH_FUNC 6
|
||||
@ -291,6 +294,8 @@ int board_mmc_getcd(u8 *cd, struct mmc *mmc);
|
||||
|
||||
#ifdef CONFIG_GENERIC_MMC
|
||||
int atmel_mci_init(void *regs);
|
||||
#define mmc_host_is_spi(mmc) ((mmc)->host_caps & MMC_MODE_SPI)
|
||||
struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
|
||||
#else
|
||||
int mmc_legacy_init(int verbose);
|
||||
#endif
|
||||
|
Loading…
Reference in New Issue
Block a user