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board: ls1043ardb: Add micro QE support for ls1043ardb
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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@ -21,6 +21,10 @@
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#include <environment.h>
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#include <fsl_sec.h>
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#include "cpld.h"
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#ifdef CONFIG_U_QE
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#include <fsl_qe.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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@ -113,6 +117,10 @@ int board_init(void)
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enable_layerscape_ns_access();
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#endif
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#ifdef CONFIG_U_QE
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u_qe_init();
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#endif
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return 0;
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}
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@ -192,8 +192,7 @@ void qe_init(uint qe_base)
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#ifdef CONFIG_U_QE
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void u_qe_init(void)
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{
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uint qe_base = CONFIG_SYS_IMMR + 0x01400000; /* QE immr base */
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qe_immr = (qe_map_t *)qe_base;
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qe_immr = (qe_map_t *)(CONFIG_SYS_IMMR + QE_IMMR_OFFSET);
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u_qe_upload_firmware((const void *)CONFIG_SYS_QE_FW_ADDR);
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out_be32(&qe_immr->iram.iready, QE_IRAM_READY);
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@ -204,9 +203,8 @@ void u_qe_init(void)
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void u_qe_resume(void)
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{
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qe_map_t *qe_immrr;
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uint qe_base = CONFIG_SYS_IMMR + QE_IMMR_OFFSET; /* QE immr base */
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qe_immrr = (qe_map_t *)qe_base;
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qe_immrr = (qe_map_t *)(CONFIG_SYS_IMMR + QE_IMMR_OFFSET);
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u_qe_firmware_resume((const void *)CONFIG_SYS_QE_FW_ADDR, qe_immrr);
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out_be32(&qe_immrr->iram.iready, QE_IRAM_READY);
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}
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@ -268,6 +268,13 @@
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#define CONFIG_ETHPRIME "FM1@DTSEC3"
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#endif
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/* QE */
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#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
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!defined(CONFIG_QSPI_BOOT)
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#define CONFIG_U_QE
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#endif
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#define CONFIG_SYS_QE_FW_ADDR 0x60600000
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/* USB */
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#define CONFIG_HAS_FSL_XHCI_USB
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#ifdef CONFIG_HAS_FSL_XHCI_USB
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