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arm: omap4: Fix SDRAM AUTO DETECTION

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Commit "8602114 omap: emif: configure emif only when required"
breaks SDRAM_AUTO_DETECTION.
The issue is dmm_init() depends on emif_sizes[](SDRAM Auto detection)
done in do_sdram_init(). The above commit moves dmm_init() above
do_sdram_init() because of which dmm_init() uses uninitialized
emif_sizes[].
So instead of using global emif_sizes[], get sdram details locally
and calculate emif sizes.

Reported-by: Michael Cashwell <mboards@prograde.net>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This commit is contained in:
Lokesh Vutla 2013-04-04 19:51:14 +00:00 committed by Tom Rini
parent a8f408a8c4
commit d3d82e9fc6
6 changed files with 16 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
arch/arm/cpu/armv7/omap-common/emif-common.c
View File

@ -655,20 +655,27 @@ static u32 get_ddr_phy_ctrl_1(u32 freq, u8 RL)
return phy;
}
static u32 get_emif_mem_size(struct emif_device_details *devices)
static u32 get_emif_mem_size(u32 base)
{
u32 size_mbytes = 0, temp;
struct emif_device_details dev_details;
struct lpddr2_device_details cs0_dev_details, cs1_dev_details;
u32 emif_nr = emif_num(base);
if (!devices)
return 0;
emif_reset_phy(base);
dev_details.cs0_device_details = emif_get_device_details(emif_nr, CS0,
&cs0_dev_details);
dev_details.cs1_device_details = emif_get_device_details(emif_nr, CS1,
&cs1_dev_details);
emif_reset_phy(base);
if (devices->cs0_device_details) {
temp = devices->cs0_device_details->density;
if (dev_details.cs0_device_details) {
temp = dev_details.cs0_device_details->density;
size_mbytes += lpddr2_density_2_size_in_mbytes[temp];
}
if (devices->cs1_device_details) {
temp = devices->cs1_device_details->density;
if (dev_details.cs1_device_details) {
temp = dev_details.cs1_device_details->density;
size_mbytes += lpddr2_density_2_size_in_mbytes[temp];
}
/* convert to bytes */
@ -1040,13 +1047,9 @@ static void do_sdram_init(u32 base)
/* Return if no devices on this EMIF */
if (!dev_details.cs0_device_details &&
!dev_details.cs1_device_details) {
emif_sizes[emif_nr - 1] = 0;
return;
}
if (!in_sdram)
emif_sizes[emif_nr - 1] = get_emif_mem_size(&dev_details);
/*
* Get device timings:
* - Default timings specified by JESD209-2 if
@ -1108,8 +1111,8 @@ void dmm_init(u32 base)
mapped_size = 0;
section_cnt = 3;
sys_addr = CONFIG_SYS_SDRAM_BASE;
emif1_size = emif_sizes[0];
emif2_size = emif_sizes[1];
emif1_size = get_emif_mem_size(EMIF1_BASE);
emif2_size = get_emif_mem_size(EMIF2_BASE);
debug("emif1_size 0x%x emif2_size 0x%x\n", emif1_size, emif2_size);
if (!emif1_size && !emif2_size)

1
arch/arm/cpu/armv7/omap4/emif.c
View File

@ -33,7 +33,6 @@
#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
u32 *const T_num = (u32 *)OMAP4_SRAM_SCRATCH_EMIF_T_NUM;
u32 *const T_den = (u32 *)OMAP4_SRAM_SCRATCH_EMIF_T_DEN;
u32 *const emif_sizes = (u32 *)OMAP4_SRAM_SCRATCH_EMIF_SIZE;
#endif
#ifdef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS

1
arch/arm/cpu/armv7/omap5/emif.c
View File

@ -34,7 +34,6 @@
#define print_timing_reg(reg) debug(#reg" - 0x%08x\n", (reg))
static u32 *const T_num = (u32 *)OMAP5_SRAM_SCRATCH_EMIF_T_NUM;
static u32 *const T_den = (u32 *)OMAP5_SRAM_SCRATCH_EMIF_T_DEN;
static u32 *const emif_sizes = (u32 *)OMAP5_SRAM_SCRATCH_EMIF_SIZE;
#endif
#ifdef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS

1
arch/arm/include/asm/arch-omap4/omap.h
View File

@ -147,7 +147,6 @@ struct s32ktimer {
#define SRAM_SCRATCH_SPACE_ADDR NON_SECURE_SRAM_START
/* SRAM scratch space entries */
#define OMAP4_SRAM_SCRATCH_OMAP4_REV SRAM_SCRATCH_SPACE_ADDR
#define OMAP4_SRAM_SCRATCH_EMIF_SIZE (SRAM_SCRATCH_SPACE_ADDR + 0x4)
#define OMAP4_SRAM_SCRATCH_EMIF_T_NUM (SRAM_SCRATCH_SPACE_ADDR + 0xC)
#define OMAP4_SRAM_SCRATCH_EMIF_T_DEN (SRAM_SCRATCH_SPACE_ADDR + 0x10)
#define OMAP_SRAM_SCRATCH_PRCM_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x14)

1
arch/arm/include/asm/arch-omap5/omap.h
View File

@ -196,7 +196,6 @@ struct s32ktimer {
* SRAM scratch space entries
*/
#define OMAP5_SRAM_SCRATCH_OMAP5_REV SRAM_SCRATCH_SPACE_ADDR
#define OMAP5_SRAM_SCRATCH_EMIF_SIZE (SRAM_SCRATCH_SPACE_ADDR + 0x4)
#define OMAP5_SRAM_SCRATCH_EMIF_T_NUM (SRAM_SCRATCH_SPACE_ADDR + 0xC)
#define OMAP5_SRAM_SCRATCH_EMIF_T_DEN (SRAM_SCRATCH_SPACE_ADDR + 0x10)
#define OMAP_SRAM_SCRATCH_PRCM_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x14)

1
arch/arm/include/asm/emif.h
View File

@ -1165,7 +1165,6 @@ void get_lpddr2_mr_regs(const struct lpddr2_mr_regs **regs);
#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
extern u32 *const T_num;
extern u32 *const T_den;
extern u32 *const emif_sizes;
#endif
void config_data_eye_leveling_samples(u32 emif_base);