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sh: Fix compile error on lowlevel_init file

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lowlevel_init of SH was corrected to use the write/readXX macro.
However, there was a problem that was not able to be compiled partially.
This patch corrected this.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Nobuhiro Iwamatsu 2009-01-11 17:48:56 +09:00
parent a5b04d00bf
commit c9935c9925
4 changed files with 13 additions and 8 deletions
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3
board/ms7722se/lowlevel_init.S
View File

@ -131,7 +131,7 @@ bsc_init:
write32 RTCSR_A, RTCSR_D
write8 SDMR3_A, #0x00
write8 SDMR3_A, SDMR3_D
! BL bit off (init = ON) (?!?)
@ -225,6 +225,7 @@ RTCOR_D: .long 0xA55A0034
RTCSR_A: .long SBSC_RTCSR
RTCSR_D: .long 0xA55A0010
SDMR3_A: .long 0xFE500180
SDMR3_D: .long 0x0
.align 1

5
board/ms7750se/lowlevel_init.S
View File

@ -84,7 +84,7 @@ init_bsc:
write32 MCR_A, MCR_D1
/* Set SDRAM mode */
write8 SDMR3_A, #0
write8 SDMR3_A, SDMR3_D
! Do you need PCMCIA setting?
! If so, please add the lines here...
@ -108,7 +108,7 @@ init_bsc:
write32 MCR_A, MCR_D2
/* Set SDRAM mode */
write8 SDMR3_A, #0
write8 SDMR3_A, SDMR3_D
rts
nop
@ -146,6 +146,7 @@ RTCNT_D: .long 0xA500 /* RTCNT Write Code A5h Data 00h */
RTCOR_A: .long RTCOR
RTCOR_D: .long RTCOR_D_VALUE /* Set refresh time (about 15us) */
SDMR3_A: .long SDMR3_ADDRESS
SDMR3_D: .long 0x00
MCR_A: .long MCR
MCR_D1: .long MCR_D1_VALUE
MCR_D2: .long MCR_D2_VALUE

3
board/renesas/MigoR/lowlevel_init.S
View File

@ -117,7 +117,7 @@ bsc_init:
write32 RFCR_A, RFCR_D
write8 SDMR3_A, #0x00
write8 SDMR3_A, SDMR3_D
! BL bit off (init = ON) (?!?)
@ -195,6 +195,7 @@ RFCR_A: .long SBSC_RFCR
RFCR_D: .long 0xA55A0221
RTCSR_D: .long 0xA55A009a
SDMR3_A: .long 0xFE581180
SDMR3_D: .long 0x0
SR_MASK_D: .long 0xEFFFFF0F

10
board/renesas/r2dplus/lowlevel_init.S
View File

@ -36,7 +36,7 @@ lowlevel_init:
write16 PCR_A, PCR_D
write16 LED_A, #0xff
write16 LED_A, LED_D
write32 MCR_A, MCR_D1
@ -48,7 +48,7 @@ lowlevel_init:
write16 RTCSR_A, RTCSR_D
write8 SDMR3_A, #0x55
write8 SDMR3_A, SDMR3_D0
/* Wait DRAM refresh 30 times */
mov.l RFCR_A, r1
@ -61,7 +61,7 @@ lowlevel_init:
write32 MCR_A, MCR_D2
write8 SDMR3_A, #0
write8 SDMR3_A, SDMR3_D1
write32 IRLMASK_A, IRLMASK_D
@ -92,6 +92,7 @@ WCR2_D: .long 0xcff86fbf
WCR3_A: .long WCR3 /* WCR3 Address */
WCR3_D: .long 0x07777707
LED_A: .long 0x04000036 /* LED Address */
LED_D: .long 0xFF /* LED Data */
RTCNT_A: .long RTCNT /* RTCNT Address */
RTCNT_D: .long 0xA500 /* RTCNT Write Code A5h Data 00h */
RTCOR_A: .long RTCOR /* RTCOR Address */
@ -99,7 +100,8 @@ RTCOR_D: .long 0xA534 /* RTCOR Write Code */
RTCSR_A: .long RTCSR /* RTCSR Address */
RTCSR_D: .long 0xA510 /* RTCSR Write Code */
SDMR3_A: .long 0xFF9400CC /* SDMR3 Address */
SDMR3_D: .long 0x55
SDMR3_D0: .long 0x55
SDMR3_D1: .long 0x00
MCR_A: .long MCR /* MCR Address */
MCR_D1: .long 0x081901F4 /* MRSET:'0' */
MCR_D2: .long 0x481901F4 /* MRSET:'1' */