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Merge patch series "Endian Kconfig improvements"

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Jiaxun Yang <jiaxun.yang@flygoat.com> says:

This is a subset of my previous arm64_be work.

I wish this could be merged first so it would be easier to work
against xtensa and arm64 be support.
This commit is contained in:
Tom Rini 2024-07-31 11:18:43 -06:00
commit c9860d7ac5
12 changed files with 61 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Makefile
View File

@ -1048,7 +1048,7 @@ endif
CHECKFLAGS += --arch=$(ARCH)
# insure the checker run with the right endianness
CHECKFLAGS += $(if $(CONFIG_CPU_BIG_ENDIAN),-mbig-endian,-mlittle-endian)
CHECKFLAGS += $(if $(CONFIG_SYS_BIG_ENDIAN),-mbig-endian,-mlittle-endian)
# the checker needs the correct machine size
CHECKFLAGS += $(if $(CONFIG_64BIT),-m64,-m32)

34
arch/Kconfig
View File

@ -8,6 +8,13 @@ config CREATE_ARCH_SYMLINK
config HAVE_ARCH_IOREMAP
bool
config SUPPORT_BIG_ENDIAN
bool
config SUPPORT_LITTLE_ENDIAN
bool
default y if !SUPPORT_BIG_ENDIAN
config SYS_CACHE_SHIFT_4
bool
@ -59,6 +66,8 @@ config ARC
select SUPPORT_OF_CONTROL
select SYS_CACHE_SHIFT_7
select TIMER
select SUPPORT_BIG_ENDIAN
select SUPPORT_LITTLE_ENDIAN
select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN
select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN
@ -68,6 +77,7 @@ config ARM
select CREATE_ARCH_SYMLINK
select HAVE_PRIVATE_LIBGCC if !ARM64
select SUPPORT_ACPI
select SUPPORT_LITTLE_ENDIAN
select SUPPORT_OF_CONTROL
config M68K
@ -77,10 +87,13 @@ config M68K
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
select SYS_CACHE_SHIFT_4
select SUPPORT_BIG_ENDIAN
select SUPPORT_OF_CONTROL
config MICROBLAZE
bool "MicroBlaze architecture"
select SUPPORT_BIG_ENDIAN
select SUPPORT_LITTLE_ENDIAN
select SUPPORT_OF_CONTROL
imply CMD_TIMER
imply SPL_REGMAP if SPL
@ -101,12 +114,14 @@ config NIOS2
select DM
select DM_EVENT
select OF_CONTROL
select SUPPORT_LITTLE_ENDIAN
select SUPPORT_OF_CONTROL
imply CMD_DM
config PPC
bool "PowerPC architecture"
select HAVE_PRIVATE_LIBGCC
select SUPPORT_BIG_ENDIAN
select SUPPORT_OF_CONTROL
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
@ -115,6 +130,7 @@ config RISCV
bool "RISC-V architecture"
select CREATE_ARCH_SYMLINK
select SUPPORT_ACPI
select SUPPORT_LITTLE_ENDIAN
select SUPPORT_OF_CONTROL
select OF_CONTROL
select DM
@ -160,6 +176,8 @@ config SANDBOX
select PCI_ENDPOINT
select SPI
select SUPPORT_OF_CONTROL
select SUPPORT_BIG_ENDIAN
select SUPPORT_LITTLE_ENDIAN
select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
select SYS_CACHE_SHIFT_4
select IRQ
@ -224,6 +242,7 @@ config SANDBOX
config SH
bool "SuperH architecture"
select SUPPORT_LITTLE_ENDIAN
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
@ -231,6 +250,7 @@ config X86
bool "x86 architecture"
select SUPPORT_SPL
select SUPPORT_TPL
select SUPPORT_LITTLE_ENDIAN
select CREATE_ARCH_SYMLINK
select DM
select HAVE_ARCH_IOMAP
@ -312,6 +332,7 @@ config X86
config XTENSA
bool "Xtensa architecture"
select CREATE_ARCH_SYMLINK
select SUPPORT_LITTLE_ENDIAN
select SUPPORT_OF_CONTROL
endchoice
@ -515,24 +536,21 @@ endif
source "board/keymile/Kconfig"
if MIPS || MICROBLAZE
choice
prompt "Endianness selection"
default SYS_BIG_ENDIAN if MIPS || MICROBLAZE
default SYS_LITTLE_ENDIAN
help
Some MIPS boards can be configured for either little or big endian
Some boards can be configured for either little or big endian
byte order. These modes require different U-Boot images. In general there
is one preferred byteorder for a particular system but some systems are
just as commonly used in the one or the other endianness.
config SYS_BIG_ENDIAN
bool "Big endian"
depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE
depends on SUPPORT_BIG_ENDIAN
config SYS_LITTLE_ENDIAN
bool "Little endian"
depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE
depends on SUPPORT_LITTLE_ENDIAN
endchoice
endif

10
arch/arc/include/asm/arc-bcr.h
View File

@ -15,7 +15,7 @@
union bcr_di_cache {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
#ifdef CONFIG_SYS_BIG_ENDIAN
unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
#else
unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
@ -26,7 +26,7 @@ union bcr_di_cache {
union bcr_slc_cfg {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
#ifdef CONFIG_SYS_BIG_ENDIAN
unsigned int pad:24, way:2, lsz:2, sz:4;
#else
unsigned int sz:4, lsz:2, way:2, pad:24;
@ -37,7 +37,7 @@ union bcr_slc_cfg {
union bcr_generic {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
#ifdef CONFIG_SYS_BIG_ENDIAN
unsigned int pad:24, ver:8;
#else
unsigned int ver:8, pad:24;
@ -48,7 +48,7 @@ union bcr_generic {
union bcr_clust_cfg {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
#ifdef CONFIG_SYS_BIG_ENDIAN
unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
#else
unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
@ -59,7 +59,7 @@ union bcr_clust_cfg {
union bcr_mmu_4 {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
#ifdef CONFIG_SYS_BIG_ENDIAN
unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
#else

4
arch/arm/cpu/armv8/linux-kernel-image-header-vars.h
View File

@ -31,7 +31,7 @@
* when PIE is in effect. So we need to split them up in 32-bit high and low
* words.
*/
#ifdef CONFIG_CPU_BIG_ENDIAN
#ifdef CONFIG_SYS_BIG_ENDIAN
#define DATA_LE32(data) \
((((data) & 0x000000ff) << 24) | \
(((data) & 0x0000ff00) << 8) | \
@ -55,7 +55,7 @@
#endif
#define __MEM_USAGE (__CODE_DATA_SIZE + __MAX_EXTRA_RAM_USAGE)
#ifdef CONFIG_CPU_BIG_ENDIAN
#ifdef CONFIG_SYS_BIG_ENDIAN
#define __HEAD_FLAG_BE 1
#else
#define __HEAD_FLAG_BE 0

20
arch/mips/Kconfig
View File

@ -28,14 +28,14 @@ config TARGET_MALTA
select OF_ISA_BUS
select PCI_MAP_SYSTEM_MEMORY
select ROM_EXCEPTION_VECTORS
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
select SUPPORTS_CPU_MIPS32_R6
select SUPPORTS_CPU_MIPS64_R1
select SUPPORTS_CPU_MIPS64_R2
select SUPPORTS_CPU_MIPS64_R6
select SUPPORTS_LITTLE_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORT_LITTLE_ENDIAN
select SWAP_IO_SPACE
imply CMD_DM
@ -86,7 +86,7 @@ config ARCH_MTMIPS
select ROM_EXCEPTION_VECTORS
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
select SUPPORTS_LITTLE_ENDIAN
select SUPPORT_LITTLE_ENDIAN
select SUPPORT_SPL
config ARCH_JZ47XX
@ -112,7 +112,7 @@ config ARCH_OCTEON
select MIPS_TUNE_OCTEON3
select MTD
select ROM_EXCEPTION_VECTORS
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS64_OCTEON
select PHYS_64BIT
select OF_CONTROL
@ -138,14 +138,14 @@ config TARGET_BOSTON
select OF_BOARD_SETUP
select OF_CONTROL
select ROM_EXCEPTION_VECTORS
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
select SUPPORTS_CPU_MIPS32_R6
select SUPPORTS_CPU_MIPS64_R1
select SUPPORTS_CPU_MIPS64_R2
select SUPPORTS_CPU_MIPS64_R6
select SUPPORTS_LITTLE_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORT_LITTLE_ENDIAN
imply CMD_DM
config TARGET_XILFPGA
@ -159,7 +159,7 @@ config TARGET_XILFPGA
select ROM_EXCEPTION_VECTORS
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
select SUPPORTS_LITTLE_ENDIAN
select SUPPORT_LITTLE_ENDIAN
imply CMD_DM
help
This supports IMGTEC MIPSfpga platform
@ -413,12 +413,6 @@ config MIPS_BOOT_FDT
endmenu
config SUPPORTS_BIG_ENDIAN
bool
config SUPPORTS_LITTLE_ENDIAN
bool
config SUPPORTS_CPU_MIPS32_R1
bool

8
arch/mips/mach-ath79/Kconfig
View File

@ -8,7 +8,7 @@ config SOC_AR933X
bool
select MIPS_TUNE_24KC
select ROM_EXCEPTION_VECTORS
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
help
@ -17,7 +17,7 @@ config SOC_AR933X
config SOC_AR934X
bool
select MIPS_TUNE_74KC
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
select USB_EHCI_IS_TDI if USB_EHCI_HCD
@ -28,7 +28,7 @@ config SOC_QCA953X
bool
select MIPS_TUNE_24KC
select ROM_EXCEPTION_VECTORS
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
help
@ -37,7 +37,7 @@ config SOC_QCA953X
config SOC_QCA956X
bool
select MIPS_TUNE_74KC
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
help

20
arch/mips/mach-bmips/Kconfig
View File

@ -23,7 +23,7 @@ config SOC_BMIPS_BCM3380
bool "BMIPS BCM3380 family"
select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SYSRESET_WATCHDOG
help
@ -33,7 +33,7 @@ config SOC_BMIPS_BCM6318
bool "BMIPS BCM6318 family"
select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SYSRESET_SYSCON
help
@ -43,7 +43,7 @@ config SOC_BMIPS_BCM6328
bool "BMIPS BCM6328 family"
select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SYSRESET_SYSCON
help
@ -53,7 +53,7 @@ config SOC_BMIPS_BCM6338
bool "BMIPS BCM6338 family"
select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SYSRESET_SYSCON
help
@ -63,7 +63,7 @@ config SOC_BMIPS_BCM6348
bool "BMIPS BCM6348 family"
select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SYSRESET_WATCHDOG
help
@ -73,7 +73,7 @@ config SOC_BMIPS_BCM6358
bool "BMIPS BCM6358 family"
select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SYSRESET_SYSCON
help
@ -83,7 +83,7 @@ config SOC_BMIPS_BCM6368
bool "BMIPS BCM6368 family"
select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SYSRESET_SYSCON
help
@ -93,7 +93,7 @@ config SOC_BMIPS_BCM6362
bool "BMIPS BCM6362 family"
select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SYSRESET_SYSCON
help
@ -103,7 +103,7 @@ config SOC_BMIPS_BCM63268
bool "BMIPS BCM63268 family"
select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SYSRESET_SYSCON
help
@ -114,7 +114,7 @@ config SOC_BMIPS_BCM6838
bool "BMIPS BCM6838 family"
select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SYSRESET_SYSCON
help

2
arch/mips/mach-jz47xx/Kconfig
View File

@ -6,7 +6,7 @@ config SYS_SOC
config SOC_JZ4780
bool
select SUPPORTS_LITTLE_ENDIAN
select SUPPORT_LITTLE_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
help

4
arch/mips/mach-mscc/Kconfig
View File

@ -6,10 +6,10 @@ menu "MSCC VCore-III platforms"
config SOC_VCOREIII
select MIPS_TUNE_24KC
select ROM_EXCEPTION_VECTORS
select SUPPORTS_BIG_ENDIAN
select SUPPORT_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
select SUPPORTS_LITTLE_ENDIAN
select SUPPORT_LITTLE_ENDIAN
bool
config SYS_SOC

2
arch/mips/mach-pic32/Kconfig
View File

@ -13,7 +13,7 @@ config SOC_PIC32MZDA
select ROM_EXCEPTION_VECTORS
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2
select SUPPORTS_LITTLE_ENDIAN
select SUPPORT_LITTLE_ENDIAN
select SYS_MIPS_CACHE_INIT_RAM_LOAD
help
This supports Microchip PIC32MZ[DA] family of microcontrollers.

2
drivers/mtd/nand/raw/brcmnand/brcmnand.c
View File

@ -1698,7 +1698,7 @@ static int brcmnand_fill_dma_desc(struct brcmnand_host *host,
desc->cmd_irq = (dma_cmd << 24) |
(end ? (0x03 << 8) : 0) | /* IRQ | STOP */
(!!begin) | ((!!end) << 1); /* head, tail */
#ifdef CONFIG_CPU_BIG_ENDIAN
#ifdef CONFIG_SYS_BIG_ENDIAN
desc->cmd_irq |= 0x01 << 12;
#endif
desc->dram_addr = lower_32_bits(buf);

2
scripts/Makefile.build
View File

@ -224,7 +224,7 @@ recordmcount_source := $(srctree)/scripts/recordmcount.c \
$(srctree)/scripts/recordmcount.h
else
sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
"$(if $(CONFIG_SYS_BIG_ENDIAN),big,little)" \
"$(if $(CONFIG_64BIT),64,32)" \
"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS)" \
"$(LD) $(KBUILD_LDFLAGS)" "$(NM)" "$(RM)" "$(MV)" \