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udoo_neo: Remove USDHC3 support
It's not necessary to support USDHC3 in U-Boot as it's being used for the WLAN. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
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a02d517b01
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@ -81,16 +81,6 @@ static iomux_v3_cfg_t const board_recognition_pads[] = {
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MX6_PAD_NAND_ALE__GPIO4_IO_0 | BOARD_DETECT_PAD_CFG,
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MX6_PAD_NAND_ALE__GPIO4_IO_0 | BOARD_DETECT_PAD_CFG,
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};
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};
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static iomux_v3_cfg_t const usdhc3_pads[] = {
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/* Configured for WLAN */
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MX6_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_DATA0__USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_DATA1__USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_DATA2__USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_DATA3__USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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};
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static iomux_v3_cfg_t const wdog_b_pad = {
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static iomux_v3_cfg_t const wdog_b_pad = {
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MX6_PAD_GPIO1_IO13__GPIO1_IO_13 | MUX_PAD_CTRL(WDOG_PAD_CTRL),
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MX6_PAD_GPIO1_IO13__GPIO1_IO_13 | MUX_PAD_CTRL(WDOG_PAD_CTRL),
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};
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};
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@ -171,91 +161,19 @@ static struct fsl_esdhc_cfg usdhc_cfg[2] = {
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int board_mmc_getcd(struct mmc *mmc)
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int board_mmc_getcd(struct mmc *mmc)
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{
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{
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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return !gpio_get_value(USDHC2_CD_GPIO);
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int ret = 0;
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switch (cfg->esdhc_base) {
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case USDHC2_BASE_ADDR:
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ret = !gpio_get_value(USDHC2_CD_GPIO);
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break;
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}
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return ret;
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}
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}
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int board_mmc_init(bd_t *bis)
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int board_mmc_init(bd_t *bis)
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{
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{
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#ifndef CONFIG_SPL_BUILD
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imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
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int i, ret;
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
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/*
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gpio_direction_input(USDHC2_CD_GPIO);
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* According to the board_mmc_init() the following map is done:
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gpio_direction_output(USDHC2_PWR_GPIO, 1);
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* (U-boot device node) (Physical Port)
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* mmc0 USDHC2
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*/
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for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
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switch (i) {
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case 0:
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imx_iomux_v3_setup_multiple_pads(
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usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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gpio_direction_input(USDHC2_CD_GPIO);
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gpio_direction_output(USDHC2_PWR_GPIO, 1);
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break;
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case 1:
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imx_iomux_v3_setup_multiple_pads(
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usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
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usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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break;
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default:
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printf("Warning: you configured more USDHC controllers\
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(%d) than supported by the board\n", i + 1);
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return -EINVAL;
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}
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ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
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if (ret) {
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printf("Warning:\
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failed to initialize mmc dev %d\n", i);
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return ret;
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}
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}
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return 0;
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#else
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struct src *src_regs = (struct src *)SRC_BASE_ADDR;
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u32 val;
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u32 port;
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val = readl(&src_regs->sbmr1);
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if ((val & 0xc0) != 0x40) {
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printf("Not boot from USDHC!\n");
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return -EINVAL;
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}
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port = (val >> 11) & 0x3;
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printf("port %d\n", port);
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switch (port) {
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case 1:
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imx_iomux_v3_setup_multiple_pads(
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usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
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gpio_direction_input(USDHC2_CD_GPIO);
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gpio_direction_output(USDHC2_PWR_GPIO, 1);
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break;
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case 2:
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imx_iomux_v3_setup_multiple_pads(
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usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
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usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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usdhc_cfg[1].esdhc_base = USDHC3_BASE_ADDR;
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break;
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}
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gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
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gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
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#endif
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}
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}
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char *board_string(void)
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char *board_string(void)
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@ -27,7 +27,6 @@
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/* Command definition */
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/* Command definition */
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_MMC_ENV_DEV 0 /*USDHC2*/
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#define CONFIG_SYS_MMC_ENV_DEV 0 /*USDHC2*/
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/* Linux only */
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/* Linux only */
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