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riscv: ae350: support OpenSBI 1.0+ which enable FW_PIC

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Original OpenSBI (without FW_PIC) will relocate itself
from 0x1000000 to 0x0. After OpenSBI added FW_PIC codes,
it will not relocate any more and always run at 0x1000000.
Hence, it may overlap with Kernel memory region. So it is
necessary to change OpenSBI address from 0x1000000 to 0x0.

More details can refer to commit cb052d7712
("riscv: qemu: spl: Fix booting Linux kernel with OpenSBI 1.0+")

Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
This commit is contained in:
Rick Chen 2023-01-04 10:37:48 +08:00 committed by Leo Yu-Chi Liang
parent 3c60e59a4f
commit c5740bc1b2
1 changed files with 1 additions and 1 deletions
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2
board/AndesTech/ax25-ae350/Kconfig
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@ -25,7 +25,7 @@ config SPL_TEXT_BASE
default 0x800000
config SPL_OPENSBI_LOAD_ADDR
default 0x01000000
default 0x00000000
config SYS_FDT_BASE
hex