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riscv: ae350: support OpenSBI 1.0+ which enable FW_PIC
Original OpenSBI (without FW_PIC) will relocate itself
from 0x1000000 to 0x0. After OpenSBI added FW_PIC codes,
it will not relocate any more and always run at 0x1000000.
Hence, it may overlap with Kernel memory region. So it is
necessary to change OpenSBI address from 0x1000000 to 0x0.
More details can refer to commit cb052d7712
("riscv: qemu: spl: Fix booting Linux kernel with OpenSBI 1.0+")
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
This commit is contained in:
parent
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@ -25,7 +25,7 @@ config SPL_TEXT_BASE
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default 0x800000
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default 0x800000
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config SPL_OPENSBI_LOAD_ADDR
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config SPL_OPENSBI_LOAD_ADDR
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default 0x01000000
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default 0x00000000
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config SYS_FDT_BASE
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config SYS_FDT_BASE
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hex
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hex
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