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clk: at91: sam9x60: Add initial setup of UPLL and USBCK rates

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In order for some of the functionalities, such as the USB clocks,
to work properly we need some clocks to be properly initialised
at the very beginning of booting.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
This commit is contained in:
Sergiu Moga 2023-03-08 16:39:53 +02:00 committed by Eugen Hristev
parent 248e41002b
commit c544e8181a
1 changed files with 30 additions and 0 deletions
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30
drivers/clk/at91/sam9x60.c
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@ -378,6 +378,31 @@ static const struct {
{ .n = "dbgu_gclk", .id = 47, },
};
/**
* Clock setup description
* @cid: clock id corresponding to clock subsystem
* @pid: parent clock id corresponding to clock subsystem
* @rate: clock rate
* @prate: parent rate
*/
static const struct pmc_clk_setup sam9x60_clk_setup[] = {
{
.cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_FRAC),
.rate = 960000000,
},
{
.cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV),
.rate = 480000000,
},
{
.cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_USBCK),
.pid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV),
.rate = 48000000,
},
};
#define prepare_mux_table(_allocs, _index, _dst, _src, _num, _label) \
do { \
int _i; \
@ -668,6 +693,11 @@ static int sam9x60_clk_probe(struct udevice *dev)
clk_dm(AT91_TO_CLK_ID(PMC_TYPE_GCK, sam9x60_gck[i].id), c);
}
/* Setup clocks. */
ret = at91_clk_setup(sam9x60_clk_setup, ARRAY_SIZE(sam9x60_clk_setup));
if (ret)
goto fail;
return 0;
fail: