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rockchip; rk3399: disable SRAM security region
Some host like SD and eMMC may use DMA to transter data to SRAM, set memory to non-secure to make sure the address can be accessed. The security of SRAM in OS suppose to initialized in ATF bl31, and the SPL is before the bl31. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
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@ -156,8 +156,6 @@ void secure_timer_init(void)
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writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
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}
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#define SGRF_DDR_RGN_CON16 0xff330040
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void board_debug_uart_init(void)
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{
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#include <asm/arch/grf_rk3399.h>
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@ -188,6 +186,8 @@ void board_debug_uart_init(void)
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}
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#define GRF_EMMCCORE_CON11 0xff77f02c
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#define SGRF_DDR_RGN_CON16 0xff330040
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#define SGRF_SLV_SECURE_CON4 0xff33e3d0
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void board_init_f(ulong dummy)
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{
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struct udevice *pinctrl;
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@ -207,6 +207,7 @@ void board_init_f(ulong dummy)
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debug_uart_init();
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printascii("U-Boot SPL board init");
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#endif
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/* Emmc clock generator: disable the clock multipilier */
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rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
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@ -217,7 +218,7 @@ void board_init_f(ulong dummy)
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}
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/*
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* Disable DDR security regions.
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* Disable DDR and SRAM security regions.
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*
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* As we are entered from the BootROM, the region from
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* 0x0 through 0xfffff (i.e. the first MB of memory) will
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@ -226,6 +227,7 @@ void board_init_f(ulong dummy)
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* located in this range.
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*/
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rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0);
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rk_clrreg(SGRF_SLV_SECURE_CON4, 0x2000);
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secure_timer_init();
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