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usb: ehci-mx5: Remove unneeded write to cscmr1 register

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Currently we have the following behavior in ehci_hcd_init()

- Read csmr1 register, clear bit 26 and then set bit 26.

However a little bit later we call set_usb_phy_clk() which clears bit 26, so
let's get rid of the unnecessary code.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
Fabio Estevam 2013-07-26 13:54:27 -03:00 committed by Marek Vasut
parent c4219a82cd
commit c3904128ad
1 changed files with 0 additions and 9 deletions
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9
drivers/usb/host/ehci-mx5.c
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@ -221,15 +221,6 @@ void __weak board_ehci_hcd_postinit(struct usb_ehci *ehci, int port)
int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{ {
struct usb_ehci *ehci; struct usb_ehci *ehci;
#ifdef CONFIG_MX53
struct clkctl *sc_regs = (struct clkctl *)CCM_BASE_ADDR;
u32 reg;
reg = __raw_readl(&sc_regs->cscmr1) & ~(1 << 26);
/* derive USB PHY clock multiplexer from PLL3 */
reg |= 1 << 26;
__raw_writel(reg, &sc_regs->cscmr1);
#endif
set_usboh3_clk(); set_usboh3_clk();
enable_usboh3_clk(1); enable_usboh3_clk(1);