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arm: mvebu: add DB-88F6820-AMC board
This board is a plug in card for Marvell's switch system development kits. Form-factor aside it is similar to the DB-88F6820-GP with the following differences. - TCLK is 200MHz - SPI1 is used - No SATA - No MMC - NAND flash Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Chris Packham
Stefan Roese
parent
53d601fdcd
commit
c0def248ca
@ -70,6 +70,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
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armada-375-db.dtb \
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armada-388-clearfog.dtb \
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armada-388-gp.dtb \
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armada-385-amc.dtb \
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armada-xp-gp.dtb \
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armada-xp-maxbcm.dtb \
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armada-xp-synology-ds414.dtb \
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155
arch/arm/dts/armada-385-amc.dts
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155
arch/arm/dts/armada-385-amc.dts
Normal file
@ -0,0 +1,155 @@
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/*
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* Device Tree file for Marvell Armada 385 development board
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* (DB-88F6820-AMC)
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*
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* Copyright (C) 2014 Marvell
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*
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without
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* any warranty of any kind, whether express or implied.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "armada-385.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Marvell Armada 385 AMC";
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compatible = "marvell,a385-amc", "marvell,armada385", "marvell,armada380";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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aliases {
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ethernet0 = ð0;
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ethernet1 = ð1;
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spi1 = &spi1;
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x80000000>; /* 2 GB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
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MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
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internal-regs {
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i2c@11000 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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};
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serial@12000 {
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/*
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* Exported on the micro USB connector CON16
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* through an FTDI
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*/
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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u-boot,dm-pre-reloc;
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};
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ethernet@34000 {
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status = "okay";
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phy = <&phy1>;
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phy-mode = "sgmii";
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};
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usb@58000 {
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status = "okay";
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};
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ethernet@70000 {
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pinctrl-names = "default";
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/*
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* The Reference Clock 0 is used to provide a
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* clock to the PHY
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*/
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pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
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status = "okay";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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mdio@72004 {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins>;
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phy0: ethernet-phy@1 {
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reg = <1>;
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};
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phy1: ethernet-phy@0 {
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reg = <0>;
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};
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};
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};
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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};
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};
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};
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&spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_pins>;
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status = "okay";
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u-boot,dm-pre-reloc;
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spi-flash@0 {
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u-boot,dm-pre-reloc;
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p128", "jedec,spi-nor";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <50000000>;
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m25p,fast-read;
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};
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};
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&refclk {
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clock-frequency = <20000000>;
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};
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@ -41,6 +41,10 @@ config TARGET_DB_88F6820_GP
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bool "Support DB-88F6820-GP"
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select 88F6820
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config TARGET_DB_88F6820_AMC
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bool "Support DB-88F6820-AMC"
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select 88F6820
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config TARGET_DB_MV784MP_GP
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bool "Support db-mv784mp-gp"
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select MV78460
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@ -63,6 +67,7 @@ config SYS_BOARD
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default "clearfog" if TARGET_CLEARFOG
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default "db-88f6720" if TARGET_DB_88F6720
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default "db-88f6820-gp" if TARGET_DB_88F6820_GP
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default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
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default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
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default "ds414" if TARGET_DS414
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default "maxbcm" if TARGET_MAXBCM
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@ -72,6 +77,7 @@ config SYS_CONFIG_NAME
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default "clearfog" if TARGET_CLEARFOG
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default "db-88f6720" if TARGET_DB_88F6720
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default "db-88f6820-gp" if TARGET_DB_88F6820_GP
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default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
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default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
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default "ds414" if TARGET_DS414
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default "maxbcm" if TARGET_MAXBCM
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@ -81,6 +87,7 @@ config SYS_VENDOR
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default "Marvell" if TARGET_DB_MV784MP_GP
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default "Marvell" if TARGET_DB_88F6720
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default "Marvell" if TARGET_DB_88F6820_GP
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default "Marvell" if TARGET_DB_88F6820_AMC
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default "solidrun" if TARGET_CLEARFOG
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default "Synology" if TARGET_DS414
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6
board/Marvell/db-88f6820-amc/MAINTAINERS
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6
board/Marvell/db-88f6820-amc/MAINTAINERS
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@ -0,0 +1,6 @@
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DB_88F6820_AMC BOARD
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M: Chris Packham <chris.packham@alliedtelesis.co.nz>
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S: Maintained
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F: board/Marvell/db-88f6820-amc/
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F: include/configs/db-88f6820-amc.h
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F: configs/db-88f6820-amc_defconfig
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7
board/Marvell/db-88f6820-amc/Makefile
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7
board/Marvell/db-88f6820-amc/Makefile
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#
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# Copyright (C) 2015 Stefan Roese <sr@denx.de>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := db-88f6820-amc.o
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129
board/Marvell/db-88f6820-amc/db-88f6820-amc.c
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129
board/Marvell/db-88f6820-amc/db-88f6820-amc.c
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@ -0,0 +1,129 @@
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/*
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* Copyright (C) 2015 Stefan Roese <sr@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <i2c.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include "../drivers/ddr/marvell/a38x/ddr3_a38x_topology.h"
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#include <../serdes/a38x/high_speed_env_spec.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define ETH_PHY_CTRL_REG 0
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#define ETH_PHY_CTRL_POWER_DOWN_BIT 11
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#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT)
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/*
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* Those values and defines are taken from the Marvell U-Boot version
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* "u-boot-2013.01-2016_T1.0.eng_drop_v10"
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*/
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#define DB_AMC_88F68XX_GPP_OUT_ENA_LOW \
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(~(BIT(29)))
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#define DB_AMC_88F68XX_GPP_OUT_ENA_MID \
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(~(BIT(12) | BIT(17) | BIT(18) | BIT(20) | BIT(21)))
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#define DB_AMC_88F68XX_GPP_OUT_VAL_LOW (BIT(29))
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#define DB_AMC_88F68XX_GPP_OUT_VAL_MID 0x0
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#define DB_AMC_88F68XX_GPP_OUT_VAL_HIGH 0x0
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#define DB_AMC_88F68XX_GPP_POL_LOW 0x0
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#define DB_AMC_88F68XX_GPP_POL_MID 0x0
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static struct serdes_map board_serdes_map[] = {
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{PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
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{DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
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{DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
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{DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
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{SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0},
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{SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0}
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};
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int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count)
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{
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*serdes_map_array = board_serdes_map;
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*count = ARRAY_SIZE(board_serdes_map);
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return 0;
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}
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/*
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* Define the DDR layout / topology here in the board file. This will
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* be used by the DDR3 init code in the SPL U-Boot version to configure
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* the DDR3 controller.
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*/
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static struct hws_topology_map board_topology_map = {
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0x1, /* active interfaces */
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/* cs_mask, mirror, dqs_swap, ck_swap X PUPs */
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{ { { {0x1, 0, 0, 0},
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{0x1, 0, 0, 0},
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{0x1, 0, 0, 0},
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{0x1, 0, 0, 0},
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{0x1, 0, 0, 0} },
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SPEED_BIN_DDR_1866L, /* speed_bin */
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BUS_WIDTH_8, /* memory_width */
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MEM_4G, /* mem_size */
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DDR_FREQ_800, /* frequency */
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0, 0, /* cas_l cas_wl */
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HWS_TEMP_LOW} }, /* temperature */
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5, /* Num Of Bus Per Interface*/
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BUS_MASK_32BIT /* Busses mask */
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};
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struct hws_topology_map *ddr3_get_topology_map(void)
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{
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/* Return the board topology as defined in the board code */
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return &board_topology_map;
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}
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int board_early_init_f(void)
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{
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/* Configure MPP */
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writel(0x11111111, MVEBU_MPP_BASE + 0x00);
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writel(0x11111111, MVEBU_MPP_BASE + 0x04);
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writel(0x55066011, MVEBU_MPP_BASE + 0x08);
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writel(0x05055550, MVEBU_MPP_BASE + 0x0c);
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writel(0x05055555, MVEBU_MPP_BASE + 0x10);
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writel(0x01106565, MVEBU_MPP_BASE + 0x14);
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writel(0x40000000, MVEBU_MPP_BASE + 0x18);
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writel(0x00004444, MVEBU_MPP_BASE + 0x1c);
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/* Set GPP Out value */
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writel(DB_AMC_88F68XX_GPP_OUT_VAL_LOW, MVEBU_GPIO0_BASE + 0x00);
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writel(DB_AMC_88F68XX_GPP_OUT_VAL_MID, MVEBU_GPIO1_BASE + 0x00);
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/* Set GPP Polarity */
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writel(DB_AMC_88F68XX_GPP_POL_LOW, MVEBU_GPIO0_BASE + 0x0c);
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writel(DB_AMC_88F68XX_GPP_POL_MID, MVEBU_GPIO1_BASE + 0x0c);
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/* Set GPP Out Enable */
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writel(DB_AMC_88F68XX_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04);
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writel(DB_AMC_88F68XX_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04);
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return 0;
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}
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int board_init(void)
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{
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/* adress of boot parameters */
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gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
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return 0;
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}
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int checkboard(void)
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{
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puts("Board: Marvell DB-88F6820-AMC\n");
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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cpu_eth_init(bis); /* Built in controller(s) come first */
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return pci_eth_init(bis);
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}
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12
board/Marvell/db-88f6820-amc/kwbimage.cfg
Normal file
12
board/Marvell/db-88f6820-amc/kwbimage.cfg
Normal file
@ -0,0 +1,12 @@
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#
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# Copyright (C) 2014 Stefan Roese <sr@denx.de>
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#
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# Armada XP uses version 1 image format
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VERSION 1
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# Boot Media configurations
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BOOT_FROM spi
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# Binary Header (bin_hdr) with DDR3 training code
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BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068
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43
configs/db-88f6820-amc_defconfig
Normal file
43
configs/db-88f6820-amc_defconfig
Normal file
@ -0,0 +1,43 @@
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CONFIG_ARM=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_TARGET_DB_88F6820_AMC=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_DEFAULT_DEVICE_TREE="armada-385-amc"
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CONFIG_BOOTDELAY=3
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CONFIG_SPL=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_SPL_OF_TRANSLATE=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_DEBUG_UART=y
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CONFIG_DEBUG_UART_BASE=0xd0012000
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CONFIG_DEBUG_UART_CLOCK=200000000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYS_NS16550=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_STORAGE=y
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123
include/configs/db-88f6820-amc.h
Normal file
123
include/configs/db-88f6820-amc.h
Normal file
@ -0,0 +1,123 @@
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/*
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* Copyright (C) 2014 Stefan Roese <sr@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _CONFIG_DB_88F6820_AMC_H
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#define _CONFIG_DB_88F6820_AMC_H
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/*
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* High Level Configuration Options (easy to change)
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*/
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|
||||
#define CONFIG_DISPLAY_BOARDINFO_LATE
|
||||
|
||||
/*
|
||||
* TEXT_BASE needs to be below 16MiB, since this area is scrubbed
|
||||
* for DDR ECC byte filling in the SPL before loading the main
|
||||
* U-Boot into it.
|
||||
*/
|
||||
#define CONFIG_SYS_TEXT_BASE 0x00800000
|
||||
#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
|
||||
|
||||
/*
|
||||
* Commands configuration
|
||||
*/
|
||||
#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
|
||||
#define CONFIG_CMD_ENV
|
||||
#define CONFIG_CMD_PCI
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_MVTWSI
|
||||
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x0
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
|
||||
/* SPI NOR flash default params, used by sf commands */
|
||||
#define CONFIG_SF_DEFAULT_BUS 1
|
||||
#define CONFIG_SF_DEFAULT_SPEED 1000000
|
||||
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
|
||||
|
||||
/* Partition support */
|
||||
#define CONFIG_DOS_PARTITION
|
||||
#define CONFIG_EFI_PARTITION
|
||||
|
||||
/* Additional FS support/configuration */
|
||||
#define CONFIG_SUPPORT_VFAT
|
||||
|
||||
/* USB/EHCI configuration */
|
||||
#define CONFIG_EHCI_IS_TDI
|
||||
|
||||
/* Environment in SPI NOR flash */
|
||||
#define CONFIG_ENV_IS_IN_SPI_FLASH
|
||||
#define CONFIG_ENV_SPI_BUS 1
|
||||
#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
|
||||
#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
|
||||
#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
|
||||
|
||||
#define CONFIG_PHY_MARVELL /* there is a marvell phy */
|
||||
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
|
||||
|
||||
/* PCIe support */
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define CONFIG_PCI
|
||||
#define CONFIG_PCI_MVEBU
|
||||
#define CONFIG_PCI_PNP
|
||||
#define CONFIG_PCI_SCAN_SHOW
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */
|
||||
#define CONFIG_SYS_ALT_MEMTEST
|
||||
|
||||
/* Keep device tree and initrd in lower memory so the kernel can access them */
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"fdt_high=0x10000000\0" \
|
||||
"initrd_high=0x10000000\0"
|
||||
|
||||
/* SPL */
|
||||
/*
|
||||
* Select the boot device here
|
||||
*
|
||||
* Currently supported are:
|
||||
* SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
|
||||
*
|
||||
* MMC is not populated on this board.
|
||||
* NAND support may be added in the future.
|
||||
*/
|
||||
#define SPL_BOOT_SPI_NOR_FLASH 1
|
||||
#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
|
||||
|
||||
/* Defines for SPL */
|
||||
#define CONFIG_SPL_FRAMEWORK
|
||||
#define CONFIG_SPL_SIZE (140 << 10)
|
||||
#define CONFIG_SPL_TEXT_BASE 0x40000030
|
||||
#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
|
||||
|
||||
#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
|
||||
#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
|
||||
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#define CONFIG_SYS_MALLOC_SIMPLE
|
||||
#endif
|
||||
|
||||
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
|
||||
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
|
||||
|
||||
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
|
||||
/* SPL related SPI defines */
|
||||
#define CONFIG_SPL_SPI_LOAD
|
||||
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||
#endif
|
||||
|
||||
/*
|
||||
* mv-common.h should be defined after CMD configs since it used them
|
||||
* to enable certain macros
|
||||
*/
|
||||
#include "mv-common.h"
|
||||
#undef CONFIG_SYS_MAXARGS
|
||||
#define CONFIG_SYS_MAXARGS 96
|
||||
|
||||
#endif /* _CONFIG_DB_88F6820_AMC_H */
|
||||
Loading…
Reference in New Issue
Block a user