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powerpc/85xx: Fix compile errors if CONFIG_SYS_{B,Q}MAN_MEM_PHYS aren't set

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Add ifdef protection in LAW & TLB code to handle the case in which
CONFIG_SYS_BMAN_MEM_PHYS or CONFIG_SYS_QMAN_MEM_PHYS arent defined for a
build.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala 2011-05-20 00:51:55 -05:00
parent 810cb19003
commit be1ff615ea
2 changed files with 8 additions and 0 deletions
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4
board/freescale/corenet_ds/law.c
View File

@ -29,8 +29,12 @@
struct law_entry law_table[] = { struct law_entry law_table[] = {
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC), SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
#ifdef CONFIG_SYS_BMAN_MEM_PHYS
SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_BMAN), SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_BMAN),
#endif
#ifdef CONFIG_SYS_QMAN_MEM_PHYS
SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_QMAN), SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_QMAN),
#endif
SET_LAW(PIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC), SET_LAW(PIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC),
#ifdef CONFIG_SYS_DCSRBAR_PHYS #ifdef CONFIG_SYS_DCSRBAR_PHYS
SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR), SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),

4
board/freescale/corenet_ds/tlb.c
View File

@ -98,6 +98,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
0, 6, BOOKE_PAGESZ_256K, 1), 0, 6, BOOKE_PAGESZ_256K, 1),
/* Bman/Qman */ /* Bman/Qman */
#ifdef CONFIG_SYS_BMAN_MEM_PHYS
SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE, CONFIG_SYS_BMAN_MEM_PHYS, SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE, CONFIG_SYS_BMAN_MEM_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, 0, MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 9, BOOKE_PAGESZ_1M, 1), 0, 9, BOOKE_PAGESZ_1M, 1),
@ -105,6 +106,8 @@ struct fsl_e_tlb_entry tlb_table[] = {
CONFIG_SYS_BMAN_MEM_PHYS + 0x00100000, CONFIG_SYS_BMAN_MEM_PHYS + 0x00100000,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 10, BOOKE_PAGESZ_1M, 1), 0, 10, BOOKE_PAGESZ_1M, 1),
#endif
#ifdef CONFIG_SYS_QMAN_MEM_PHYS
SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE, CONFIG_SYS_QMAN_MEM_PHYS, SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE, CONFIG_SYS_QMAN_MEM_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, 0, MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 11, BOOKE_PAGESZ_1M, 1), 0, 11, BOOKE_PAGESZ_1M, 1),
@ -112,6 +115,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
CONFIG_SYS_QMAN_MEM_PHYS + 0x00100000, CONFIG_SYS_QMAN_MEM_PHYS + 0x00100000,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 12, BOOKE_PAGESZ_1M, 1), 0, 12, BOOKE_PAGESZ_1M, 1),
#endif
#ifdef CONFIG_SYS_DCSRBAR_PHYS #ifdef CONFIG_SYS_DCSRBAR_PHYS
SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS, SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,