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* Patch by John Kerl, 19 Apr 2004:
Use U-boot's miiphy.h for PHY register names, rather than introducing a new header file. * Update pci_ids.h from linux-2.4.26 * Patch by Masami Komiya, 19 Apr 2004: Fix problem cause by VLAN function on little endian architecture without VLAN environment
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12
CHANGELOG
12
CHANGELOG
@ -2,8 +2,18 @@
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Changes for U-Boot 1.1.1:
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======================================================================
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* Patch by John Kerl, 19 Apr 2004:
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Use U-boot's miiphy.h for PHY register names, rather than
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introducing a new header file.
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* Update pci_ids.h from linux-2.4.26
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* Patch by Masami Komiya, 19 Apr 2004:
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Fix problem cause by VLAN function on little endian architecture
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without VLAN environment
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* Clean up the TQM8xx_YYMHz configurations; allow to use the same
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binary image for all clok frequencies. Implement run-time
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binary image for all clock frequencies. Implement run-time
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optimization of flash access timing based on the actual bus
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frequency.
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@ -31,8 +31,6 @@
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#if (CONFIG_COMMANDS & CFG_CMD_MII)
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#include <miiphy.h>
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#define CONFIG_TERSE_MII /* XXX necessary here because "miivals.h" is missing */
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#ifdef CONFIG_TERSE_MII
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/*
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* Display values from last command.
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@ -149,8 +147,6 @@ U_BOOT_CMD(
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#else /* ! CONFIG_TERSE_MII ================================================= */
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#include <miivals.h>
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typedef struct _MII_reg_desc_t {
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ushort regno;
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char * name;
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@ -343,14 +339,14 @@ static int special_field(
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ushort regval)
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{
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if ((regno == 0) && (pdesc->lo == 6)) {
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ushort speed_bits = regval & MII_CTL_SPEED_MASK;
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ushort speed_bits = regval & PHY_BMCR_SPEED_MASK;
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printf("%2u,%2u = b%u%u speed selection = %s Mbps",
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6, 13,
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(regval >> 6) & 1,
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(regval >> 13) & 1,
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speed_bits == MII_CTL_SPEED_1000_MBPS ? "1000" :
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speed_bits == MII_CTL_SPEED_100_MBPS ? "100" :
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speed_bits == MII_CTL_SPEED_10_MBPS ? "10" :
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speed_bits == PHY_BMCR_1000_MBPS ? "1000" :
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speed_bits == PHY_BMCR_100_MBPS ? "100" :
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speed_bits == PHY_BMCR_10_MBPS ? "10" :
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"???");
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return 1;
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}
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@ -367,9 +363,9 @@ static int special_field(
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ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
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printf("%2u-%2u = %5u selector = %s",
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pdesc->hi, pdesc->lo, sel_bits,
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sel_bits == MII_AN_ADV_IEEE_802_3 ?
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sel_bits == PHY_ANLPAR_PSB_802_3 ?
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"IEEE 802.3" :
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sel_bits == MII_AN_ADV_IEEE_802_9_ISLAN_16T ?
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sel_bits == PHY_ANLPAR_PSB_802_9 ?
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"IEEE 802.9 ISLAN-16T" :
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"???");
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return 1;
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@ -379,9 +375,9 @@ static int special_field(
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ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
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printf("%2u-%2u = %u selector = %s",
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pdesc->hi, pdesc->lo, sel_bits,
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sel_bits == MII_AN_PARTNER_IEEE_802_3 ?
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sel_bits == PHY_ANLPAR_PSB_802_3 ?
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"IEEE 802.3" :
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sel_bits == MII_AN_PARTNER_IEEE_802_9_ISLAN_16T ?
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sel_bits == PHY_ANLPAR_PSB_802_9 ?
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"IEEE 802.9 ISLAN-16T" :
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"???");
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return 1;
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@ -418,7 +414,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
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{
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char op;
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unsigned char addrlo, addrhi, reglo, reghi;
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unsigned char addr, reg;
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unsigned char addr = 0, reg = 0;
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unsigned short data;
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int rcode = 0;
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@ -93,6 +93,11 @@ int miiphy_link(unsigned char addr);
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#define PHY_BMCR_DPLX 0x0100
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#define PHY_BMCR_COL_TST 0x0080
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#define PHY_BMCR_SPEED_MASK 0x2040
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#define PHY_BMCR_1000_MBPS 0x0040
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#define PHY_BMCR_100_MBPS 0x2000
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#define PHY_BMCR_10_MBPS 0x0000
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/* phy BMSR */
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#define PHY_BMSR_100T4 0x8000
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#define PHY_BMSR_100TXF 0x4000
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@ -118,6 +123,10 @@ int miiphy_link(unsigned char addr);
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#define PHY_ANLPAR_10 0x0020
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#define PHY_ANLPAR_100 0x0380 /* we can run at 100 */
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#define PHY_ANLPAR_PSB_MASK 0x001f
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#define PHY_ANLPAR_PSB_802_3 0x0001
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#define PHY_ANLPAR_PSB_802_9 0x0002
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/* PHY_1000BTSR */
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#define PHY_1000BTSR_MSCF 0x8000
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#define PHY_1000BTSR_MSCR 0x4000
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