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snowball: applying power to LAN and GBF controllers
LAN and GBF need to be powered explicitely, doing so with interface to AB8500 companion chip. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
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@ -62,7 +62,7 @@
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/* Per4 */
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#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000)
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#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x06800)
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#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000)
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/* Per3 */
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#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000)
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@ -80,4 +80,13 @@
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#define U8500_BOOTROM_BASE 0x9001f000
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#define U8500_BOOTROM_ASIC_ID_OFFSET 0x0ff4
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/* AB8500 specifics */
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#define AB8500_MISC 0x0010
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#define AB8500_GPIO_SEL2_REG 0x1001
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#define AB8500_GPIO_DIR2_REG 0x1011
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#define AB8500_GPIO_DIR4_REG 0x1013
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#define AB8500_GPIO_SEL4_REG 0x1003
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#define AB8500_GPIO_OUT2_REG 0x1021
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#define AB8500_GPIO_OUT4_REG 0x1023
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#endif /* __ASM_ARCH_HARDWARE_H */
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@ -64,8 +64,11 @@
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#define REQ_MB5 5
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extern int prcmu_i2c_read(u8 reg, u16 slave);
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extern int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data);
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#define ab8500_read prcmu_i2c_read
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#define ab8500_write prcmu_i2c_write
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int prcmu_i2c_read(u8 reg, u16 slave);
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int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data);
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void u8500_prcmu_enable(u32 *reg);
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void db8500_prcmu_init(void);
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@ -25,6 +25,8 @@
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#include <asm/io.h>
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#include <asm/errno.h>
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#include <asm/arch/db8500_pincfg.h>
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#include <asm/arch/prcmu.h>
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#include <asm/arch/hardware.h>
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#include "db8500_pins.h"
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@ -164,3 +166,88 @@ int dram_init(void)
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return 0;
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}
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static int raise_ab8500_gpio16(void)
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{
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int ret;
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/* selection */
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ret = ab8500_read(AB8500_MISC, AB8500_GPIO_SEL2_REG);
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if (ret < 0)
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goto out;
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ret |= 0x80;
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ret = ab8500_write(AB8500_MISC, AB8500_GPIO_SEL2_REG, ret);
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if (ret < 0)
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goto out;
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/* direction */
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ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR2_REG);
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if (ret < 0)
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goto out;
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ret |= 0x80;
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ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR2_REG, ret);
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if (ret < 0)
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goto out;
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/* out */
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ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT2_REG);
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if (ret < 0)
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goto out;
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ret |= 0x80;
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ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT2_REG, ret);
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out:
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return ret;
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}
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static int raise_ab8500_gpio26(void)
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{
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int ret;
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/* selection */
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ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR4_REG);
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if (ret < 0)
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goto out;
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ret |= 0x2;
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ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR4_REG, ret);
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if (ret < 0)
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goto out;
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/* out */
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ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT4_REG);
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if (ret < 0)
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goto out;
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ret |= 0x2;
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ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT4_REG, ret);
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out:
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return ret;
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}
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int board_late_init(void)
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{
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/* enable 3V3 for LAN controller */
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if (raise_ab8500_gpio26() >= 0) {
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/* Turn on FSMC device */
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writel(0x1, 0x8000f000);
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writel(0x1, 0x8000f008);
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/* setup FSMC for LAN controler */
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writel(0x305b, 0x80000000);
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/* run at the highest possible speed */
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writel(0x01010210, 0x80000004);
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} else
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printf("error: can't raise GPIO26\n");
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/* enable 3v6 for GBF chip */
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if ((raise_ab8500_gpio16() < 0))
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printf("error: cant' raise GPIO16\n");
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return 0;
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}
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@ -32,6 +32,7 @@
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#define CONFIG_SYS_ICACHE_OFF
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#define CONFIG_SYS_DCACHE_OFF
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_BOARD_LATE_INIT
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/*
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* High Level Configuration Options
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