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ram: rk3399: Add ddr version enc macro

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Add dram config macro for handling ddr version number.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
This commit is contained in:
Jagan Teki 2019-07-16 17:27:04 +05:30 committed by Kever Yang
parent 01cc103915
commit b713e0291b
2 changed files with 3 additions and 0 deletions
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2
arch/arm/include/asm/arch-rockchip/sdram_common.h
View File

@ -66,6 +66,7 @@ struct sdram_base_params {
* [1:0] dbw_ch0
*/
#define SYS_REG_DDRTYPE_SHIFT 13
#define DDR_SYS_REG_VERSION 2
#define SYS_REG_DDRTYPE_MASK 7
#define SYS_REG_NUM_CH_SHIFT 12
#define SYS_REG_NUM_CH_MASK 1
@ -99,6 +100,7 @@ struct sdram_base_params {
#define SYS_REG_DBW_MASK 3
#define SYS_REG_ENC_DBW(n, ch) ((2 >> (n)) << SYS_REG_DBW_SHIFT(ch))
#define SYS_REG_ENC_VERSION(n) ((n) << 28)
#define SYS_REG_ENC_CS0_ROW(n, os_reg2, os_reg3, ch) do { \
(os_reg2) |= (((n) - 13) & 0x3) << (6 + 16 * (ch)); \
(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << \

1
drivers/ram/rockchip/sdram_rk3399.c
View File

@ -1102,6 +1102,7 @@ static void dram_all_config(struct dram_info *dram,
SYS_REG_ENC_CS1_ROW(info->cap_info.cs1_row, sys_reg2,
sys_reg3, channel);
sys_reg3 |= SYS_REG_ENC_CS1_COL(info->cap_info.col, channel);
sys_reg3 |= SYS_REG_ENC_VERSION(DDR_SYS_REG_VERSION);
ddr_msch_regs = dram->chan[channel].msch;
noc_timing = &params->ch[channel].noc_timings;