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OMAP3: CM-T35: Add support for CM-T3730
CM-T3730 is exactly the same board as CM-T35, but it has TI DM3730 SoC onboard and therefore some changes have to take place Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This commit is contained in:
Igor Grinberg
Albert ARIBAUD
parent
2b8754b25f
commit
b65a77a861
@ -46,7 +46,7 @@ DECLARE_GLOBAL_DATA_PTR;
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const omap3_sysinfo sysinfo = {
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DDR_DISCRETE,
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"CM-T35 board",
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"CM-T3x board",
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"NAND",
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};
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@ -82,7 +82,11 @@ int board_init(void)
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CONFIG_SYS_NAND_BASE, GPMC_SIZE_16M);
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/* board id for Linux */
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gd->bd->bi_arch_number = MACH_TYPE_CM_T35;
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if (get_cpu_family() == CPU_OMAP34XX)
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gd->bd->bi_arch_number = MACH_TYPE_CM_T35;
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else
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gd->bd->bi_arch_number = MACH_TYPE_CM_T3730;
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/* boot param addr */
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gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
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@ -110,7 +114,7 @@ int misc_init_r(void)
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* hardware. Many pins need to be moved from protect to primary
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* mode.
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*/
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void set_muxconf_regs(void)
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static void cm_t3x_set_common_muxconf(void)
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{
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/* SDRC */
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MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)); /*SDRC_D0*/
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@ -185,7 +189,7 @@ void set_muxconf_regs(void)
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/* SB-T35 Ethernet */
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MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0)); /*GPMC_nCS4*/
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/* CM-T35 Ethernet */
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/* CM-T3x Ethernet */
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MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | DIS | M0)); /*GPMC_nCS5*/
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MUX_VAL(CP(GPMC_CLK), (IEN | PTD | DIS | M4)); /*GPIO_59*/
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MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)); /*nADV_ALE*/
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@ -201,12 +205,6 @@ void set_muxconf_regs(void)
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MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)); /*DSS_HSYNC*/
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MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)); /*DSS_VSYNC*/
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MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)); /*DSS_ACBIAS*/
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MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)); /*DSS_DATA0*/
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MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)); /*DSS_DATA1*/
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MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)); /*DSS_DATA2*/
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MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)); /*DSS_DATA3*/
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MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)); /*DSS_DATA4*/
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MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)); /*DSS_DATA5*/
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MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)); /*DSS_DATA6*/
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MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)); /*DSS_DATA7*/
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MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)); /*DSS_DATA8*/
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@ -219,12 +217,6 @@ void set_muxconf_regs(void)
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MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)); /*DSS_DATA15*/
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MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)); /*DSS_DATA16*/
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MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)); /*DSS_DATA17*/
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MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)); /*DSS_DATA18*/
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MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)); /*DSS_DATA19*/
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MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)); /*DSS_DATA20*/
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MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)); /*DSS_DATA21*/
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MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)); /*DSS_DATA22*/
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MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)); /*DSS_DATA23*/
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/* serial interface */
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MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)); /*UART3_RX*/
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@ -267,12 +259,60 @@ void set_muxconf_regs(void)
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MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)); /*MMC1_DAT1*/
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MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)); /*MMC1_DAT2*/
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MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)); /*MMC1_DAT3*/
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}
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static void cm_t35_set_muxconf(void)
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{
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/* DSS */
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MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)); /*DSS_DATA0*/
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MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)); /*DSS_DATA1*/
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MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)); /*DSS_DATA2*/
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MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)); /*DSS_DATA3*/
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MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)); /*DSS_DATA4*/
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MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)); /*DSS_DATA5*/
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MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)); /*DSS_DATA18*/
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MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)); /*DSS_DATA19*/
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MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)); /*DSS_DATA20*/
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MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)); /*DSS_DATA21*/
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MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)); /*DSS_DATA22*/
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MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)); /*DSS_DATA23*/
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/* MMC1 */
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MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)); /*MMC1_DAT4*/
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MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)); /*MMC1_DAT5*/
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MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)); /*MMC1_DAT6*/
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MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)); /*MMC1_DAT7*/
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}
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static void cm_t3730_set_muxconf(void)
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{
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/* DSS */
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MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M3)); /*DSS_DATA0*/
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MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M3)); /*DSS_DATA1*/
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MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M3)); /*DSS_DATA2*/
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MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M3)); /*DSS_DATA3*/
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MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M3)); /*DSS_DATA4*/
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MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M3)); /*DSS_DATA5*/
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MUX_VAL(CP(SYS_BOOT0), (IDIS | PTD | DIS | M3)); /*DSS_DATA18*/
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MUX_VAL(CP(SYS_BOOT1), (IDIS | PTD | DIS | M3)); /*DSS_DATA19*/
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MUX_VAL(CP(SYS_BOOT3), (IDIS | PTD | DIS | M3)); /*DSS_DATA20*/
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MUX_VAL(CP(SYS_BOOT4), (IDIS | PTD | DIS | M3)); /*DSS_DATA21*/
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MUX_VAL(CP(SYS_BOOT5), (IDIS | PTD | DIS | M3)); /*DSS_DATA22*/
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MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M3)); /*DSS_DATA23*/
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}
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void set_muxconf_regs(void)
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{
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cm_t3x_set_common_muxconf();
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if (get_cpu_family() == CPU_OMAP34XX)
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cm_t35_set_muxconf();
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else
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cm_t3730_set_muxconf();
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}
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/*
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* Routine: setup_net_chip_gmpc
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* Description: Setting up the configuration GPMC registers specific to the
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@ -283,7 +323,7 @@ static void setup_net_chip_gmpc(void)
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struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
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enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[5],
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CM_T35_SMC911X_BASE, GPMC_SIZE_16M);
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CM_T3X_SMC911X_BASE, GPMC_SIZE_16M);
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enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[4],
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SB_T35_SMC911X_BASE, GPMC_SIZE_16M);
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@ -362,9 +402,9 @@ int board_eth_init(bd_t *bis)
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rc1 = handle_mac_address();
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if (rc1)
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printf("CM-T35: No MAC address found\n");
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printf("CM-T3x: No MAC address found\n");
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rc1 = smc911x_initialize(0, CM_T35_SMC911X_BASE);
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rc1 = smc911x_initialize(0, CM_T3X_SMC911X_BASE);
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if (rc1 > 0)
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rc++;
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@ -10,7 +10,7 @@
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* Richard Woodruff <r-woodruff2@ti.com>
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* Syed Mohammed Khasim <x0khasim@ti.com>
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*
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* Configuration settings for the CompuLab CM-T35 board
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* Configuration settings for the CompuLab CM-T35 and CM-T3730 boards
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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@ -40,7 +40,7 @@
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#define CONFIG_OMAP 1 /* in a TI OMAP core */
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#define CONFIG_OMAP34XX 1 /* which is a 34XX */
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#define CONFIG_OMAP3430 1 /* which is in a 3430 */
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#define CONFIG_CM_T35 1 /* working with CM-T35 */
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#define CONFIG_CM_T3X 1 /* working with CM-T35 and CM-T3730 */
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#define CONFIG_SYS_TEXT_BASE 0x80008000
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@ -253,7 +253,7 @@
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_SYS_PROMPT "CM-T35 # "
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#define CONFIG_SYS_PROMPT "CM-T3x # "
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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@ -338,9 +338,9 @@ extern unsigned int boot_flash_type;
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#define CONFIG_NET_MULTI
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#define CONFIG_SMC911X
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#define CONFIG_SMC911X_32_BIT
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#define CM_T35_SMC911X_BASE 0x2C000000
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#define SB_T35_SMC911X_BASE (CM_T35_SMC911X_BASE + (16 << 20))
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#define CONFIG_SMC911X_BASE CM_T35_SMC911X_BASE
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#define CM_T3X_SMC911X_BASE 0x2C000000
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#define SB_T35_SMC911X_BASE (CM_T3X_SMC911X_BASE + (16 << 20))
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#define CONFIG_SMC911X_BASE CM_T3X_SMC911X_BASE
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#endif /* (CONFIG_CMD_NET) */
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/* additions for new relocation code, must be added to all boards */
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