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spi: rpc: Add support for operation without clock framework
Add ifdeffery to allow operation without the clock framework enabled. This is required on RZ/A1, as it does not have clock driver yet. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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@ -173,7 +173,7 @@ config PL022_SPI
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config RENESAS_RPC_SPI
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bool "Renesas RPC SPI driver"
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depends on RCAR_GEN3
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depends on RCAR_GEN3 || RZA1
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imply SPI_FLASH_BAR
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help
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Enable the Renesas RPC SPI driver, used to access SPI NOR flash
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@ -409,27 +409,30 @@ static int rpc_spi_probe(struct udevice *dev)
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priv->regs = plat->regs;
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priv->extr = plat->extr;
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#if CONFIG_IS_ENABLED(CLK)
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clk_enable(&priv->clk);
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#endif
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return 0;
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}
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static int rpc_spi_ofdata_to_platdata(struct udevice *bus)
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{
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struct rpc_spi_platdata *plat = dev_get_platdata(bus);
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struct rpc_spi_priv *priv = dev_get_priv(bus);
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int ret;
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plat->regs = dev_read_addr_index(bus, 0);
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plat->extr = dev_read_addr_index(bus, 1);
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#if CONFIG_IS_ENABLED(CLK)
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struct rpc_spi_priv *priv = dev_get_priv(bus);
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int ret;
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ret = clk_get_by_index(bus, 0, &priv->clk);
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if (ret < 0) {
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printf("%s: Could not get clock for %s: %d\n",
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__func__, bus->name, ret);
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return ret;
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}
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#endif
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plat->freq = dev_read_u32_default(bus, "spi-max-freq", 50000000);
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@ -448,6 +451,7 @@ static const struct udevice_id rpc_spi_ids[] = {
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{ .compatible = "renesas,rpc-r8a77965" },
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{ .compatible = "renesas,rpc-r8a77970" },
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{ .compatible = "renesas,rpc-r8a77995" },
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{ .compatible = "renesas,rpc-r7s72100" },
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{ }
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};
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