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https://github.com/u-boot/u-boot.git
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Merge git://git.denx.de/u-boot-x86
This commit is contained in:
commit
b57f1895b6
@ -2,5 +2,5 @@
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#
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# Copyright (c) 2017 Intel Corporation
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obj-y += car.o tangier.o sdram.o sysreset.o
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obj-y += car.o tangier.o sdram.o sysreset.o pinmux.o
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obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
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194
arch/x86/cpu/tangier/pinmux.c
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194
arch/x86/cpu/tangier/pinmux.c
Normal file
@ -0,0 +1,194 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2018 Emlid Limited
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/pinctrl.h>
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#include <dm/read.h>
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#include <regmap.h>
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#include <syscon.h>
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#include <asm/cpu.h>
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#include <asm/scu.h>
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#include <linux/io.h>
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#define BUFCFG_OFFSET 0x100
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#define MRFLD_FAMILY_LEN 0x400
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/* These are taken from Linux kernel */
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#define MRFLD_PINMODE_MASK 0x07
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#define pin_to_bufno(f, p) ((p) - (f)->pin_base)
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struct mrfld_family {
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unsigned int family_number;
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unsigned int pin_base;
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size_t npins;
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void __iomem *regs;
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};
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#define MRFLD_FAMILY(b, s, e) \
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{ \
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.family_number = (b), \
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.pin_base = (s), \
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.npins = (e) - (s) + 1, \
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}
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/* Now we only support I2C family of pins */
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static struct mrfld_family mrfld_families[] = {
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MRFLD_FAMILY(7, 101, 114),
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};
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struct mrfld_pinctrl {
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const struct mrfld_family *families;
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size_t nfamilies;
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};
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static const struct mrfld_family *
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mrfld_get_family(struct mrfld_pinctrl *mp, unsigned int pin)
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{
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const struct mrfld_family *family;
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unsigned int i;
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for (i = 0; i < mp->nfamilies; i++) {
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family = &mp->families[i];
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if (pin >= family->pin_base &&
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pin < family->pin_base + family->npins)
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return family;
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}
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pr_err("failed to find family for pin %u\n", pin);
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return NULL;
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}
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static void __iomem *
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mrfld_get_bufcfg(struct mrfld_pinctrl *pinctrl, unsigned int pin)
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{
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const struct mrfld_family *family;
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unsigned int bufno;
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family = mrfld_get_family(pinctrl, pin);
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if (!family)
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return NULL;
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bufno = pin_to_bufno(family, pin);
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return family->regs + BUFCFG_OFFSET + bufno * 4;
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}
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static void
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mrfld_setup_families(void *base_addr,
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struct mrfld_family *families, unsigned int nfam)
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{
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for (int i = 0; i < nfam; i++) {
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struct mrfld_family *family = &families[i];
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family->regs = base_addr +
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family->family_number * MRFLD_FAMILY_LEN;
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}
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}
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static int mrfld_pinconfig_protected(unsigned int pin, u32 mask, u32 bits)
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{
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struct mrfld_pinctrl *pinctrl;
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struct udevice *dev;
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void __iomem *bufcfg;
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u32 v, value;
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int ret;
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ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &dev);
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if (ret)
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return ret;
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pinctrl = dev_get_priv(dev);
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bufcfg = mrfld_get_bufcfg(pinctrl, pin);
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if (!bufcfg)
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return -EINVAL;
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value = readl(bufcfg);
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v = (value & ~mask) | (bits & mask);
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debug("scu: v: 0x%x p: 0x%x bits: %d, mask: %d bufcfg: 0x%p\n",
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v, (u32)bufcfg, bits, mask, bufcfg);
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ret = scu_ipc_raw_command(IPCMSG_INDIRECT_WRITE, 0, &v, 4,
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NULL, 0, (u32)bufcfg, 0);
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if (ret)
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pr_err("Failed to set mode via SCU for pin %u (%d)\n",
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pin, ret);
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return ret;
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}
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static int mrfld_pinctrl_cfg_pin(ofnode pin_node)
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{
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bool is_protected;
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int pad_offset;
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int mode;
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u32 mask;
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int ret;
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/* For now we only support just protected Family of pins */
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is_protected = ofnode_read_bool(pin_node, "protected");
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if (!is_protected)
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return -ENOTSUPP;
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pad_offset = ofnode_read_s32_default(pin_node, "pad-offset", -1);
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if (pad_offset == -1)
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return -EINVAL;
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mode = ofnode_read_s32_default(pin_node, "mode-func", -1);
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if (mode == -1)
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return -EINVAL;
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mask = MRFLD_PINMODE_MASK;
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/* We don't support modes not in range 0..7 */
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if (mode & ~mask)
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return -ENOTSUPP;
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ret = mrfld_pinconfig_protected(pad_offset, mask, mode);
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return ret;
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}
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static int tangier_pinctrl_probe(struct udevice *dev)
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{
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void *base_addr = syscon_get_first_range(X86_SYSCON_PINCONF);
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struct mrfld_pinctrl *pinctrl = dev_get_priv(dev);
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ofnode pin_node;
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int ret;
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mrfld_setup_families(base_addr, mrfld_families,
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ARRAY_SIZE(mrfld_families));
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pinctrl->families = mrfld_families;
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pinctrl->nfamilies = ARRAY_SIZE(mrfld_families);
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ofnode_for_each_subnode(pin_node, dev_ofnode(dev)) {
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ret = mrfld_pinctrl_cfg_pin(pin_node);
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if (ret) {
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pr_err("%s: invalid configuration for the pin %ld\n",
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__func__, pin_node.of_offset);
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}
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}
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return 0;
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}
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static const struct udevice_id tangier_pinctrl_match[] = {
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{ .compatible = "intel,pinctrl-tangier", .data = X86_SYSCON_PINCONF },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(tangier_pinctrl) = {
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.name = "tangier_pinctrl",
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.id = UCLASS_SYSCON,
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.of_match = tangier_pinctrl_match,
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.probe = tangier_pinctrl_probe,
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.priv_auto_alloc_size = sizeof(struct mrfld_pinctrl),
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};
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compatible = "intel,reset-tangier";
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u-boot,dm-pre-reloc;
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};
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pinctrl {
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compatible = "intel,pinctrl-tangier";
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reg = <0xff0c0000 0x8000>;
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/*
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* Initial configuration came from the firmware.
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* Which quite likely has been used in the phones, where I2C #8,
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* that is not part of Atom peripheral, is in use.
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* Thus we need to override the leftover.
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*/
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i2c6_scl@0 {
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pad-offset = <111>;
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mode-func = <1>;
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protected;
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};
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i2c6_sda@0 {
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pad-offset = <112>;
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mode-func = <1>;
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protected;
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};
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};
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};
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@ -221,6 +221,16 @@ Device (PCI0)
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}
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}
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Device (I2C6)
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{
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Name (_ADR, 0x00090001)
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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}
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Device (GPIO)
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{
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Name (_ADR, 0x000c0000)
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#define _X86_ASM_SCU_IPC_H_
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/* IPC defines the following message types */
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#define IPCMSG_INDIRECT_READ 0x02
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#define IPCMSG_INDIRECT_WRITE 0x05
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#define IPCMSG_WARM_RESET 0xf0
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#define IPCMSG_COLD_RESET 0xf1
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#define IPCMSG_SOFT_RESET 0xf2
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@ -23,5 +25,7 @@ struct ipc_ifwi_version {
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/* Issue commands to the SCU with or without data */
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int scu_ipc_simple_command(u32 cmd, u32 sub);
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int scu_ipc_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, int outlen);
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int scu_ipc_raw_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out,
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int outlen, u32 dptr, u32 sptr);
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#endif /* _X86_ASM_SCU_IPC_H_ */
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@ -101,6 +101,57 @@ static int scu_ipc_cmd(struct ipc_regs *regs, u32 cmd, u32 sub,
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return err;
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}
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/**
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* scu_ipc_raw_command() - IPC command with data and pointers
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* @cmd: IPC command code
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* @sub: IPC command sub type
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* @in: input data of this IPC command
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* @inlen: input data length in dwords
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* @out: output data of this IPC command
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* @outlen: output data length in dwords
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* @dptr: data writing to SPTR register
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* @sptr: data writing to DPTR register
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*
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* Send an IPC command to SCU with input/output data and source/dest pointers.
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*
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* Return: an IPC error code or 0 on success.
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*/
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int scu_ipc_raw_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out,
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int outlen, u32 dptr, u32 sptr)
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{
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int inbuflen = DIV_ROUND_UP(inlen, 4);
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struct udevice *dev;
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struct scu *scu;
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int ret;
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ret = syscon_get_by_driver_data(X86_SYSCON_SCU, &dev);
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if (ret)
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return ret;
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scu = dev_get_priv(dev);
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/* Up to 16 bytes */
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if (inbuflen > 4)
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return -EINVAL;
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writel(dptr, &scu->regs->dptr);
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writel(sptr, &scu->regs->sptr);
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/*
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* SRAM controller doesn't support 8-bit writes, it only
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* supports 32-bit writes, so we have to copy input data into
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* the temporary buffer, and SCU FW will use the inlen to
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* determine the actual input data length in the temporary
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* buffer.
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*/
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u32 inbuf[4] = {0};
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memcpy(inbuf, in, inlen);
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return scu_ipc_cmd(scu->regs, cmd, sub, inbuf, inlen, out, outlen);
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}
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/**
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* scu_ipc_simple_command() - send a simple command
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* @cmd: command
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@ -129,6 +180,17 @@ int scu_ipc_simple_command(u32 cmd, u32 sub)
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return scu_ipc_check_status(scu->regs);
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}
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/**
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* scu_ipc_command - command with data
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* @cmd: command
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* @sub: sub type
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* @in: input data
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* @inlen: input length in dwords
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* @out: output data
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* @outlen: output length in dwords
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*
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* Issue a command to the SCU which involves data transfers.
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*/
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int scu_ipc_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, int outlen)
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{
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struct scu *scu;
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@ -47,8 +47,6 @@
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/*-----------------------------------------------------------------------
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* Serial Configuration
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*/
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#define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \
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9600, 19200, 38400, 115200}
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#define CONFIG_SYS_NS16550_PORT_MAPPED
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/*-----------------------------------------------------------------------
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