ls102xa: dcu: Add platform support for DCU on LS1021ATWR board

This patch adds the TWR_LCD_RGB card/HDMI options and the common
configuration for DCU on LS1021ATWR board.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
This commit is contained in:
Wang Huan 2014-09-05 13:52:50 +08:00 committed by York Sun
parent 4081bf4f90
commit b4ecc8c6f8
4 changed files with 72 additions and 0 deletions

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@ -5,3 +5,4 @@
# #
obj-y += ls1021atwr.o obj-y += ls1021atwr.o
obj-$(CONFIG_FSL_DCU_FB) += dcu.o

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@ -0,0 +1,47 @@
/*
* Copyright 2014 Freescale Semiconductor, Inc.
*
* FSL DCU Framebuffer driver
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <fsl_dcu_fb.h>
#include "div64.h"
#include "../common/dcu_sii9022a.h"
DECLARE_GLOBAL_DATA_PTR;
unsigned int dcu_set_pixel_clock(unsigned int pixclock)
{
unsigned long long div;
div = (unsigned long long)(gd->bus_clk / 1000);
div *= (unsigned long long)pixclock;
do_div(div, 1000000000);
return div;
}
int platform_dcu_init(unsigned int xres, unsigned int yres,
const char *port,
struct fb_videomode *dcu_fb_videomode)
{
const char *name;
unsigned int pixel_format;
if (strncmp(port, "twr_lcd", 4) == 0) {
name = "TWR_LCD_RGB card";
} else {
name = "HDMI";
dcu_set_dvi_encoder(dcu_fb_videomode);
}
printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
pixel_format = 32;
fsl_dcu_init(xres, yres, pixel_format);
return 0;
}

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@ -261,6 +261,12 @@ int board_early_init_f(void)
init_early_memctl_regs(); init_early_memctl_regs();
#endif #endif
#ifdef CONFIG_FSL_DCU_FB
out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_REV);
out_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN);
out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_NOREV);
#endif
return 0; return 0;
} }

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@ -162,6 +162,24 @@
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_GENERIC_MMC #define CONFIG_GENERIC_MMC
/*
* Video
*/
#define CONFIG_FSL_DCU_FB
#ifdef CONFIG_FSL_DCU_FB
#define CONFIG_VIDEO
#define CONFIG_CMD_BMP
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_FSL_DCU_SII9022A
#define CONFIG_SYS_I2C_DVI_BUS_NUM 1
#define CONFIG_SYS_I2C_DVI_ADDR 0x39
#endif
/* /*
* eTSEC * eTSEC
*/ */