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arm64: zynqmp: Use DWC3 generic driver and DM_USB
Remove harcoded XHCI lists and detect mode, speed based on DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Serial-changes: 2 - Remove also XHCI macros from hardware.h - Remove additional new line in zcu106
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@ -17,9 +17,6 @@
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#define ARASAN_NAND_BASEADDR 0xFF100000
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#define ZYNQMP_USB0_XHCI_BASEADDR 0xFE200000
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#define ZYNQMP_USB1_XHCI_BASEADDR 0xFE300000
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#define ZYNQMP_TCM_BASE_ADDR 0xFFE00000
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#define ZYNQMP_TCM_SIZE 0x40000
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@ -548,49 +548,3 @@ int checkboard(void)
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puts("Board: Xilinx ZynqMP\n");
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return 0;
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}
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#ifdef CONFIG_USB_DWC3
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static struct dwc3_device dwc3_device_data0 = {
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.maximum_speed = USB_SPEED_HIGH,
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.base = ZYNQMP_USB0_XHCI_BASEADDR,
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.dr_mode = USB_DR_MODE_PERIPHERAL,
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.index = 0,
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};
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static struct dwc3_device dwc3_device_data1 = {
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.maximum_speed = USB_SPEED_HIGH,
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.base = ZYNQMP_USB1_XHCI_BASEADDR,
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.dr_mode = USB_DR_MODE_PERIPHERAL,
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.index = 1,
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};
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int usb_gadget_handle_interrupts(int index)
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{
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dwc3_uboot_handle_interrupt(index);
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return 0;
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}
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int board_usb_init(int index, enum usb_init_type init)
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{
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debug("%s: index %x\n", __func__, index);
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#if defined(CONFIG_USB_GADGET_DOWNLOAD)
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g_dnl_set_serialnumber(CONFIG_SYS_CONFIG_NAME);
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#endif
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switch (index) {
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case 0:
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return dwc3_uboot_init(&dwc3_device_data0);
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case 1:
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return dwc3_uboot_init(&dwc3_device_data1);
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};
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return -1;
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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dwc3_uboot_exit(index);
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return 0;
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}
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#endif
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@ -83,6 +83,7 @@ CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_XHCI_ZYNQMP=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GADGET=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_STORAGE=y
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@ -79,6 +79,7 @@ CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_XHCI_ZYNQMP=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GADGET=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_STORAGE=y
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@ -75,6 +75,7 @@ CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_XHCI_ZYNQMP=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GADGET=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_STORAGE=y
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@ -73,6 +73,7 @@ CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_XHCI_ZYNQMP=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GADGET=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_STORAGE=y
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@ -93,6 +93,7 @@ CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_XHCI_ZYNQMP=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GADGET=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_STORAGE=y
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@ -91,6 +91,7 @@ CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_XHCI_ZYNQMP=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GADGET=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_STORAGE=y
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@ -91,6 +91,7 @@ CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_XHCI_ZYNQMP=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GADGET=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_STORAGE=y
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@ -84,6 +84,7 @@ CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_XHCI_ZYNQMP=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GADGET=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_STORAGE=y
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@ -84,6 +84,7 @@ CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_XHCI_ZYNQMP=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GADGET=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_STORAGE=y
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@ -90,6 +90,7 @@ CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_XHCI_ZYNQMP=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GADGET=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_STORAGE=y
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@ -84,6 +84,7 @@ CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_XHCI_ZYNQMP=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GADGET=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_STORAGE=y
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@ -11,7 +11,6 @@
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#define CONFIG_ZYNQ_SDHCI0
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#define CONFIG_ZYNQ_SDHCI1
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#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
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#include <configs/xilinx_zynqmp.h>
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@ -9,8 +9,6 @@
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#ifndef __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H
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#define __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H
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#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB1_XHCI_BASEADDR}
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#include <configs/xilinx_zynqmp.h>
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#endif /* __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H */
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@ -11,9 +11,6 @@
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#define CONFIG_ZYNQ_SDHCI1
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#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
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ZYNQMP_USB1_XHCI_BASEADDR}
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#include <configs/xilinx_zynqmp.h>
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#endif /* __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H */
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@ -24,9 +24,6 @@
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{0, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
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}
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#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
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ZYNQMP_USB1_XHCI_BASEADDR}
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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@ -35,8 +35,6 @@
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#define CONFIG_PCA953X
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#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_ZYNQ_EEPROM_BUS 5
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#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
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@ -26,8 +26,6 @@
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#define CONFIG_PCA953X
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#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#include <configs/xilinx_zynqmp.h>
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#define CONFIG_PCA953X
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#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_ZYNQ_EEPROM_BUS 5
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#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
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@ -38,8 +38,6 @@
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#define CONFIG_PCA953X
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#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_ZYNQ_EEPROM_BUS 5
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#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
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