Merge tag 'fsl-qoriq-2023-4-6' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq

convert NXP LS1028A RDB and QDS to DM_SERIAL
enable DM_SERIAL for ls1088a
sync serial nodes with linux for lx2160a/ls1088a

arch/arm/dts/fsl-ls1088a-qds.dtsi

@@ -132,6 +132,14 @@
 	};
 };
 
+&duart0 {
+	status = "okay";
+};
+
+&duart1 {
+	status = "okay";
+};
+
 &dspi {
 	bus-num = <0>;
 	status = "okay";

arch/arm/dts/fsl-ls1088a-rdb.dts

@@ -142,6 +142,14 @@
 	};
 };
 
+&duart0 {
+	status = "okay";
+};
+
+&duart1 {
+	status = "okay";
+};
+
 &qspi {
 	status = "okay";
 

arch/arm/dts/fsl-ls1088a-ten64.dts

@@ -20,6 +20,8 @@
 	compatible = "traverse,ten64", "fsl,ls1088a";
 
 	aliases {
+		serial0 = &duart0;
+		serial1 = &duart1;
 		spi0 = &qspi;
 	};
 
@@ -164,11 +166,11 @@
 	status = "okay";
 };
 
-&serial0 {
+&duart0 {
 	status = "okay";
 };
 
-&serial1 {
+&duart1 {
 	status = "okay";
 };
 

arch/arm/dts/fsl-ls1088a.dtsi

@@ -2,9 +2,10 @@
 /*
  * NXP ls1088a SOC common device tree source
  *
- * Copyright 2017, 2020-2021 NXP
+ * Copyright 2017, 2020-2021, 2023 NXP
  */
 
+#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 / {
 	compatible = "fsl,ls1088a";
@@ -35,6 +36,48 @@
 			     <1 10 0x8>; /* Hypervisor PPI, active-low */
 	};
 
+	sysclk: sysclk {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <100000000>;
+		clock-output-names = "sysclk";
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
+
+		clockgen: clocking@1300000 {
+			compatible = "fsl,ls1088a-clockgen";
+			reg = <0 0x1300000 0 0xa0000>;
+			#clock-cells = <2>;
+			clocks = <&sysclk>;
+		};
+
+		duart0: serial@21c0500 {
+			compatible = "fsl,ns16550", "ns16550a";
+			reg = <0x0 0x21c0500 0x0 0x100>;
+			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+					    QORIQ_CLK_PLL_DIV(4)>;
+			interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			bootph-all;
+		};
+
+		duart1: serial@21c0600 {
+			compatible = "fsl,ns16550", "ns16550a";
+			reg = <0x0 0x21c0600 0x0 0x100>;
+			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+					    QORIQ_CLK_PLL_DIV(4)>;
+			interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			bootph-all;
+		};
+	};
+
 	i2c0: i2c@2000000 {
 		compatible = "fsl,vf610-i2c";
 		#address-cells = <1>;
@@ -67,22 +110,6 @@
 		interrupts = <0 35 4>;
 	};
 
-	serial0: serial@21c0500 {
-		device_type = "serial";
-		compatible = "fsl,ns16550", "ns16550a";
-		reg = <0x0 0x21c0500 0x0 0x100>;
-		clock-frequency = <0>;	/* Updated by bootloader */
-		interrupts = <0 32 0x1>; /* edge triggered */
-	};
-
-	serial1: serial@21c0600 {
-		device_type = "serial";
-		compatible = "fsl,ns16550", "ns16550a";
-		reg = <0x0 0x21c0600 0x0 0x100>;
-		clock-frequency = <0>; 	/* Updated by bootloader */
-		interrupts = <0 32 0x1>; /* edge triggered */
-	};
-
 	dspi: dspi@2100000 {
 		compatible = "fsl,vf610-dspi";
 		#address-cells = <1>;

arch/arm/dts/fsl-lx2160a-qds.dtsi

@@ -2,7 +2,7 @@
 /*
  * NXP LX2160AQDS common device tree source
  *
- * Copyright 2018-2020 NXP
+ * Copyright 2018-2020, 2023 NXP
  *
  */
 
@@ -11,6 +11,7 @@
 / {
 	aliases {
 		spi0 = &fspi;
+		serial0 = &uart0;
 	};
 };
 
@@ -286,3 +287,11 @@
 &sata3 {
 	status = "okay";
 };
+
+&uart0 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};

arch/arm/dts/fsl-lx2160a-rdb.dts

@@ -5,7 +5,7 @@
  * Author:	Priyanka Jain <priyanka.jain@nxp.com>
  *		Sriram Dash <sriram.dash@nxp.com>
  *
- * Copyright 2018 NXP
+ * Copyright 2018, 2023 NXP
  *
  */
 
@@ -18,6 +18,7 @@
 	compatible = "fsl,lx2160ardb", "fsl,lx2160a";
 	aliases {
 		spi0 = &fspi;
+		serial0 = &uart0;
 	};
 };
 
@@ -137,3 +138,11 @@
 &sata3 {
 	status = "okay";
 };
+
+&uart0 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};

arch/arm/dts/fsl-lx2160a.dtsi

@@ -2,7 +2,7 @@
 /*
  * NXP lx2160a SOC common device tree source
  *
- * Copyright 2018-2021 NXP
+ * Copyright 2018-2021, 2023 NXP
  *
  */
 
@@ -27,6 +27,50 @@
 		clock-output-names = "sysclk";
 	};
 
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
+
+		uart0: serial@21c0000 {
+			compatible = "arm,sbsa-uart","arm,pl011";
+			reg = <0x0 0x21c0000 0x0 0x1000>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+			current-speed = <115200>;
+			status = "disabled";
+			bootph-all;
+		};
+
+		uart1: serial@21d0000 {
+			compatible = "arm,sbsa-uart","arm,pl011";
+			reg = <0x0 0x21d0000 0x0 0x1000>;
+			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+			current-speed = <115200>;
+			status = "disabled";
+			bootph-all;
+		};
+
+		uart2: serial@21e0000 {
+			compatible = "arm,sbsa-uart","arm,pl011";
+			reg = <0x0 0x21e0000 0x0 0x1000>;
+			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+			current-speed = <115200>;
+			status = "disabled";
+			bootph-all;
+		};
+
+		uart3: serial@21f0000 {
+			compatible = "arm,sbsa-uart","arm,pl011";
+			reg = <0x0 0x21f0000 0x0 0x1000>;
+			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+			current-speed = <115200>;
+			status = "disabled";
+			bootph-all;
+		};
+	};
+
 	crypto: crypto@8000000 {
 		compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
 		fsl,sec-era = <10>;
@@ -177,34 +221,6 @@
 		status = "disabled";
 	};
 
-	uart0: serial@21c0000 {
-		compatible = "arm,pl011";
-		reg = <0x0 0x21c0000 0x0 0x1000>;
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	uart1: serial@21d0000 {
-		compatible = "arm,pl011";
-		reg = <0x0 0x21d0000 0x0 0x1000>;
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	uart2: serial@21e0000 {
-		compatible = "arm,pl011";
-		reg = <0x0 0x21e0000 0x0 0x1000>;
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	uart3: serial@21f0000 {
-		compatible = "arm,pl011";
-		reg = <0x0 0x21f0000 0x0 0x1000>;
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
 	dspi0: dspi@2100000 {
 		compatible = "fsl,vf610-dspi";
 		#address-cells = <1>;

board/freescale/lx2160a/lx2160a.c

@@ -55,45 +55,11 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static struct pl01x_serial_plat serial0 = {
-#if CONFIG_CONS_INDEX == 0
-	.base = CFG_SYS_SERIAL0,
-#elif CONFIG_CONS_INDEX == 1
-	.base = CFG_SYS_SERIAL1,
-#else
-#error "Unsupported console index value."
-#endif
-	.type = TYPE_PL011,
-};
-
-U_BOOT_DRVINFO(nxp_serial0) = {
-	.name = "serial_pl01x",
-	.plat = &serial0,
-};
-
-static struct pl01x_serial_plat serial1 = {
-	.base = CFG_SYS_SERIAL1,
-	.type = TYPE_PL011,
-};
-
-U_BOOT_DRVINFO(nxp_serial1) = {
-	.name = "serial_pl01x",
-	.plat = &serial1,
-};
-
-static void uart_get_clock(void)
-{
-	serial0.clock = get_serial_clock();
-	serial1.clock = get_serial_clock();
-}
-
 int board_early_init_f(void)
 {
 #if defined(CONFIG_SYS_I2C_EARLY_INIT) && defined(CONFIG_SPL_BUILD)
 	i2c_early_init_f();
 #endif
-	/* get required clock for UART IP */
-	uart_get_clock();
 
 #ifdef CONFIG_EMC2305
 	select_i2c_ch_pca9547(I2C_MUX_CH_EMC2305, 0);

configs/ls1028aqds_tfa_SECURE_BOOT_defconfig

@@ -86,7 +86,8 @@ CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_SCSI=y
 CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y

configs/ls1028aqds_tfa_defconfig

@@ -92,7 +92,8 @@ CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_SCSI=y
 CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y

configs/ls1028ardb_tfa_SECURE_BOOT_defconfig

@@ -80,7 +80,8 @@ CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_SCSI=y
 CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y

configs/ls1028ardb_tfa_defconfig

@@ -86,7 +86,8 @@ CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_SCSI=y
 CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y

configs/ls1088aqds_tfa_defconfig

@@ -118,7 +118,9 @@ CONFIG_PCIE_LAYERSCAPE_RC=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y

configs/ls1088ardb_tfa_SECURE_BOOT_defconfig

@@ -90,7 +90,9 @@ CONFIG_PCIE_LAYERSCAPE_RC=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y

configs/ls1088ardb_tfa_defconfig

@@ -96,7 +96,9 @@ CONFIG_PCIE_LAYERSCAPE_RC=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y