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arm: mvebu: a38x: Use correct PEX register access macros

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Remove the incorrect PEX macros from the DDR header. And insert the
correct ones in ctrl_pex.h instead.

Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese 2015-06-08 17:01:26 +02:00 committed by Luka Perkov
parent f1df936445
commit ad6ac7aa00
2 changed files with 4 additions and 5 deletions
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4
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h
View File

@ -19,6 +19,10 @@
#define MV_MISC_REGS_BASE MISC_REGS_OFFSET
#define SOC_CTRL_REG (MV_MISC_REGS_BASE + 0x4)
#define PEX_IF_REGS_OFFSET(if) ((if) > 0 ? \
(0x40000 + ((if) - 1) * 0x4000) : \
0x80000)
#define PEX_IF_REGS_BASE(if) (PEX_IF_REGS_OFFSET(if))
#define PEX_CAPABILITIES_REG(if) ((PEX_IF_REGS_BASE(if)) + 0x60)
#define PEX_LINK_CTRL_STATUS2_REG(if) ((PEX_IF_REGS_BASE(if)) + 0x90)
#define PEX_CTRL_REG(if) ((PEX_IF_REGS_BASE(if)) + 0x1a00)

5
drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h
View File

@ -421,11 +421,6 @@
#define PCCRIR_REVID_MASK (0xff << PCCRIR_REVID_OFFS)
/* Power Management Clock Gating Control Register */
#define MV_PEX_IF_REGS_OFFSET(pex_if) \
(pex_if < 8 ? (0x40000 + ((pex_if) / 4) * 0x40000 + \
((pex_if) % 4) * 0x4000) : \
(0x42000 + ((pex_if) % 8) * 0x40000))
#define PEX_IF_REGS_BASE(unit) (MV_PEX_IF_REGS_OFFSET(unit))
#define POWER_MNG_CTRL_REG 0x18220
#define PEX_DEVICE_AND_VENDOR_ID 0x000
#define PEX_CFG_DIRECT_ACCESS(if, reg) (PEX_IF_REGS_BASE(if) + (reg))