mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-26 21:54:37 +08:00
rockchip: px30: sync the main px30 dtsi from mainline
There have been multiple peripherals added to the main px30 dtsi in the Linux kernel since its addition to u-boot. So to make it easier to sync board devicetrees, update the core dtsi from Linux. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Heiko Stuebner
Kever Yang
parent
ab800e5a6f
commit
ac3d121c35
@ -10,6 +10,7 @@
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
#include <dt-bindings/power/px30-power.h>
|
||||
#include <dt-bindings/soc/rockchip,boot-mode.h>
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
/ {
|
||||
compatible = "rockchip,px30";
|
||||
@ -113,16 +114,11 @@
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-408000000 {
|
||||
opp-hz = /bits/ 64 <408000000>;
|
||||
opp-microvolt = <950000 950000 1350000>;
|
||||
clock-latency-ns = <40000>;
|
||||
opp-suspend;
|
||||
};
|
||||
opp-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <950000 950000 1350000>;
|
||||
clock-latency-ns = <40000>;
|
||||
opp-suspend;
|
||||
};
|
||||
opp-816000000 {
|
||||
opp-hz = /bits/ 64 <816000000>;
|
||||
@ -186,6 +182,55 @@
|
||||
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
|
||||
};
|
||||
|
||||
thermal_zones: thermal-zones {
|
||||
soc_thermal: soc-thermal {
|
||||
polling-delay-passive = <20>;
|
||||
polling-delay = <1000>;
|
||||
sustainable-power = <750>;
|
||||
thermal-sensors = <&tsadc 0>;
|
||||
|
||||
trips {
|
||||
threshold: trip-point-0 {
|
||||
temperature = <70000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
target: trip-point-1 {
|
||||
temperature = <85000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
soc_crit: soc-crit {
|
||||
temperature = <115000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
contribution = <4096>;
|
||||
};
|
||||
|
||||
map1 {
|
||||
trip = <&target>;
|
||||
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
contribution = <4096>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpu_thermal: gpu-thermal {
|
||||
polling-delay-passive = <100>; /* milliseconds */
|
||||
polling-delay = <1000>; /* milliseconds */
|
||||
thermal-sensors = <&tsadc 1>;
|
||||
};
|
||||
};
|
||||
|
||||
xin24m: xin24m {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
@ -370,6 +415,36 @@
|
||||
compatible = "rockchip,px30-io-voltage-domain";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lvds: lvds {
|
||||
compatible = "rockchip,px30-lvds";
|
||||
phys = <&dsi_dphy>;
|
||||
phy-names = "dphy";
|
||||
rockchip,grf = <&grf>;
|
||||
rockchip,output = "lvds";
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
lvds_vopb_in: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vopb_out_lvds>;
|
||||
};
|
||||
|
||||
lvds_vopl_in: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&vopl_out_lvds>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
uart1: serial@ff158000 {
|
||||
@ -650,6 +725,26 @@
|
||||
};
|
||||
};
|
||||
|
||||
tsadc: tsadc@ff280000 {
|
||||
compatible = "rockchip,px30-tsadc";
|
||||
reg = <0x0 0xff280000 0x0 0x100>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
assigned-clocks = <&cru SCLK_TSADC>;
|
||||
assigned-clock-rates = <50000>;
|
||||
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
|
||||
clock-names = "tsadc", "apb_pclk";
|
||||
resets = <&cru SRST_TSADC>;
|
||||
reset-names = "tsadc-apb";
|
||||
rockchip,grf = <&grf>;
|
||||
rockchip,hw-tshut-temp = <120000>;
|
||||
pinctrl-names = "init", "default", "sleep";
|
||||
pinctrl-0 = <&tsadc_otp_gpio>;
|
||||
pinctrl-1 = <&tsadc_otp_out>;
|
||||
pinctrl-2 = <&tsadc_otp_gpio>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
saradc: saradc@ff288000 {
|
||||
compatible = "rockchip,px30-saradc", "rockchip,rk3399-saradc";
|
||||
reg = <0x0 0xff288000 0x0 0x100>;
|
||||
@ -706,12 +801,48 @@
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
usb2phy_grf: syscon@ff2c0000 {
|
||||
compatible = "rockchip,px30-usb2phy-grf", "syscon",
|
||||
"simple-mfd";
|
||||
reg = <0x0 0xff2c0000 0x0 0x10000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
u2phy: usb2-phy@100 {
|
||||
compatible = "rockchip,px30-usb2phy";
|
||||
reg = <0x100 0x20>;
|
||||
clocks = <&pmucru SCLK_USBPHY_REF>;
|
||||
clock-names = "phyclk";
|
||||
#clock-cells = <0>;
|
||||
assigned-clocks = <&cru USB480M>;
|
||||
assigned-clock-parents = <&u2phy>;
|
||||
clock-output-names = "usb480m_phy";
|
||||
status = "disabled";
|
||||
|
||||
u2phy_host: host-port {
|
||||
#phy-cells = <0>;
|
||||
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "linestate";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
u2phy_otg: otg-port {
|
||||
#phy-cells = <0>;
|
||||
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "otg-bvalid", "otg-id",
|
||||
"linestate";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dsi_dphy: phy@ff2e0000 {
|
||||
compatible = "rockchip,px30-dsi-dphy";
|
||||
reg = <0x0 0xff2e0000 0x0 0x10000>;
|
||||
clocks = <&pmucru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>;
|
||||
clock-names = "ref", "pclk";
|
||||
#clock-cells = <0>;
|
||||
resets = <&cru SRST_MIPIDSIPHY_P>;
|
||||
reset-names = "apb";
|
||||
#phy-cells = <0>;
|
||||
@ -731,6 +862,8 @@
|
||||
g-rx-fifo-size = <280>;
|
||||
g-tx-fifo-size = <256 128 128 64 32 16>;
|
||||
g-use-dma;
|
||||
phys = <&u2phy_otg>;
|
||||
phy-names = "usb2-phy";
|
||||
power-domains = <&power PX30_PD_USB>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -741,6 +874,8 @@
|
||||
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_HOST>;
|
||||
clock-names = "usbhost";
|
||||
phys = <&u2phy_host>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&power PX30_PD_USB>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -751,6 +886,8 @@
|
||||
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_HOST>;
|
||||
clock-names = "usbhost";
|
||||
phys = <&u2phy_host>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&power PX30_PD_USB>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -823,17 +960,30 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpu: gpu@ff400000 {
|
||||
compatible = "rockchip,px30-mali", "arm,mali-bifrost";
|
||||
reg = <0x0 0xff400000 0x0 0x4000>;
|
||||
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "job", "mmu", "gpu";
|
||||
clocks = <&cru SCLK_GPU>;
|
||||
#cooling-cells = <2>;
|
||||
power-domains = <&power PX30_PD_GPU>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsi: dsi@ff450000 {
|
||||
compatible = "rockchip,px30-mipi-dsi";
|
||||
reg = <0x0 0xff450000 0x0 0x10000>;
|
||||
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru PCLK_MIPI_DSI>, <&dsi_dphy>;
|
||||
clock-names = "pclk", "pll";
|
||||
resets = <&cru SRST_MIPIDSI_HOST_P>;
|
||||
reset-names = "apb";
|
||||
clocks = <&cru PCLK_MIPI_DSI>;
|
||||
clock-names = "pclk";
|
||||
phys = <&dsi_dphy>;
|
||||
phy-names = "dphy";
|
||||
power-domains = <&power PX30_PD_VO>;
|
||||
resets = <&cru SRST_MIPIDSI_HOST_P>;
|
||||
reset-names = "apb";
|
||||
rockchip,grf = <&grf>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -883,6 +1033,11 @@
|
||||
reg = <0>;
|
||||
remote-endpoint = <&dsi_in_vopb>;
|
||||
};
|
||||
|
||||
vopb_out_lvds: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&lvds_vopb_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -920,6 +1075,11 @@
|
||||
reg = <0>;
|
||||
remote-endpoint = <&dsi_in_vopl>;
|
||||
};
|
||||
|
||||
vopl_out_lvds: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&lvds_vopl_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user