mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-25 05:04:23 +08:00
ARM: implement relocation for ARM926
Change the implementation for arm926 to relocate the code to an arbitrary address in RAM. Adapt the TX25 (i.MX25), magnesium board to test the changes. On the tx25 board TEXT_BASE is set to the final relocation address to prevent one more copying of u-boot code when relocating. More info see: doc/README.arm-relocation da850 board: Tested-by: Ben Gardiner <bengardiner@nanometrics.ca> Portions of this work were supported by funding from the CE Linux Forum. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Ben Gardiner <bengardiner@nanometrics.ca>
This commit is contained in:
parent
561142af20
commit
ab86f72c35
@ -49,7 +49,7 @@ u32 orion5x_sdram_bar(enum memory_bank bank)
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result = winregs[bank].base;
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return result;
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}
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#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
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int dram_init(void)
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{
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int i;
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@ -62,3 +62,25 @@ int dram_init(void)
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}
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return 0;
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}
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#else
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int dram_init (void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size(
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(volatile long *) orion5x_sdram_bar(0),
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CONFIG_MAX_RAM_BANK_SIZE);
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return 0;
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}
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void dram_init_banksize (void)
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{
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int i;
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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gd->bd->bi_dram[i].start = orion5x_sdram_bar(i);
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gd->bd->bi_dram[i].size = get_ram_size(
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(volatile long *) (gd->bd->bi_dram[i].start),
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CONFIG_MAX_RAM_BANK_SIZE);
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}
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}
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#endif
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@ -114,12 +114,15 @@ _fiq:
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*************************************************************************
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*/
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.globl _TEXT_BASE
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_TEXT_BASE:
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.word TEXT_BASE
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#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
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.globl _armboot_start
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_armboot_start:
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.word _start
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#endif
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/*
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* These are defined in the board-specific linker script.
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@ -144,7 +147,165 @@ FIQ_STACK_START:
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.word 0x0badc0de
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#endif
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#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
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/* IRQ stack memory (calculated at run-time) + 8 bytes */
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.globl IRQ_STACK_START_IN
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IRQ_STACK_START_IN:
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.word 0x0badc0de
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.globl _datarel_start
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_datarel_start:
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.word __datarel_start
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.globl _datarelrolocal_start
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_datarelrolocal_start:
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.word __datarelrolocal_start
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.globl _datarellocal_start
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_datarellocal_start:
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.word __datarellocal_start
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.globl _datarelro_start
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_datarelro_start:
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.word __datarelro_start
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.globl _got_start
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_got_start:
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.word __got_start
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.globl _got_end
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_got_end:
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.word __got_end
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/*
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* the actual reset code
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*/
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reset:
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/*
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* set the cpu to SVC32 mode
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*/
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mrs r0,cpsr
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bic r0,r0,#0x1f
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orr r0,r0,#0xd3
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msr cpsr,r0
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/*
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* we do sys-critical inits only at reboot,
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* not when booting from ram!
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*/
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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bl cpu_init_crit
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#endif
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/* Set stackpointer in internal RAM to call board_init_f */
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call_board_init_f:
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ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
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ldr r0,=0x00000000
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bl board_init_f
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/*------------------------------------------------------------------------------*/
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/*
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* void relocate_code (addr_sp, gd, addr_moni)
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*
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* This "function" does not return, instead it continues in RAM
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* after relocating the monitor code.
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*
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*/
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.globl relocate_code
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relocate_code:
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mov r4, r0 /* save addr_sp */
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mov r5, r1 /* save addr of gd */
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mov r6, r2 /* save addr of destination */
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mov r7, r2 /* save addr of destination */
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/* Set up the stack */
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stack_setup:
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mov sp, r4
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adr r0, _start
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ldr r2, _TEXT_BASE
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ldr r3, _bss_start
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sub r2, r3, r2 /* r2 <- size of armboot */
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add r2, r0, r2 /* r2 <- source end address */
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cmp r0, r6
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beq clear_bss
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#ifndef CONFIG_SKIP_RELOCATE_UBOOT
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copy_loop:
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ldmia r0!, {r9-r10} /* copy from source address [r0] */
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stmia r6!, {r9-r10} /* copy to target address [r1] */
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cmp r0, r2 /* until source end addreee [r2] */
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ble copy_loop
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#ifndef CONFIG_PRELOADER
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/* fix got entries */
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ldr r1, _TEXT_BASE /* Text base */
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mov r0, r7 /* reloc addr */
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ldr r2, _got_start /* addr in Flash */
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ldr r3, _got_end /* addr in Flash */
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sub r3, r3, r1
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add r3, r3, r0
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sub r2, r2, r1
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add r2, r2, r0
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fixloop:
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ldr r4, [r2]
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sub r4, r4, r1
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add r4, r4, r0
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str r4, [r2]
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add r2, r2, #4
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cmp r2, r3
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bne fixloop
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#endif
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#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
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clear_bss:
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#ifndef CONFIG_PRELOADER
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ldr r0, _bss_start
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ldr r1, _bss_end
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ldr r3, _TEXT_BASE /* Text base */
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mov r4, r7 /* reloc addr */
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sub r0, r0, r3
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add r0, r0, r4
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sub r1, r1, r3
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add r1, r1, r4
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mov r2, #0x00000000 /* clear */
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clbss_l:str r2, [r0] /* clear loop... */
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add r0, r0, #4
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cmp r0, r1
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bne clbss_l
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bl coloured_LED_init
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bl red_LED_on
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#endif
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/*
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* We are done. Do not return, instead branch to second part of board
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* initialization, now running from RAM.
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*/
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#ifdef CONFIG_NAND_SPL
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ldr pc, _nand_boot
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_nand_boot: .word nand_boot
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#else
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ldr r0, _TEXT_BASE
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ldr r2, _board_init_r
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sub r2, r2, r0
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add r2, r2, r7 /* position from board_init_r in RAM */
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/* setup parameters for board_init_r */
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mov r0, r5 /* gd_t */
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mov r1, r7 /* dest_addr */
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/* jump to it ... */
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mov lr, r2
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mov pc, lr
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_board_init_r: .word board_init_r
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#endif
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#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
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/*
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* the actual reset code
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*/
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@ -221,7 +382,7 @@ _start_armboot:
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#else
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.word start_armboot
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#endif /* CONFIG_NAND_SPL */
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#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
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/*
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*************************************************************************
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@ -307,10 +468,13 @@ cpu_init_crit:
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@ carve out a frame on current user stack
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sub sp, sp, #S_FRAME_SIZE
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stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
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#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
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ldr r2, _armboot_start
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sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
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sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
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#else
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ldr r2, IRQ_STACK_START_IN
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#endif
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@ get values for "aborted" pc and cpsr (into parm regs)
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ldmia r2, {r2 - r3}
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add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
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@ -342,9 +506,13 @@ cpu_init_crit:
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.endm
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.macro get_bad_stack
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#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
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ldr r13, _armboot_start @ setup our mode stack
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sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
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sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
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#else
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ldr r13, IRQ_STACK_START_IN @ setup our mode stack
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#endif
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str lr, [r13] @ save caller lr in position 0 of saved stack
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mrs lr, spsr @ get the spsr
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@ -39,11 +39,23 @@ SECTIONS
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.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
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. = ALIGN(4);
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.data : { *(.data) }
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.data : {
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*(.data)
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__datarel_start = .;
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*(.data.rel)
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__datarelrolocal_start = .;
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*(.data.rel.ro.local)
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__datarellocal_start = .;
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*(.data.rel.local)
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__datarelro_start = .;
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*(.data.rel.ro)
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}
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__got_start = .;
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. = ALIGN(4);
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.got : { *(.got) }
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__got_end = .;
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. = .;
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__u_boot_cmd_start = .;
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.u_boot_cmd : { *(.u_boot_cmd) }
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@ -1,5 +1,5 @@
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ifdef CONFIG_NAND_SPL
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TEXT_BASE = 0x81ec0000
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TEXT_BASE = 0x810c0000
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else
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TEXT_BASE = 0x81f00000
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TEXT_BASE = 0x81fc0000
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endif
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@ -159,7 +159,14 @@ int board_late_init(void)
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int dram_init (void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
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PHYS_SDRAM_1_SIZE);
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = get_ram_size((volatile void *)PHYS_SDRAM_1,
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PHYS_SDRAM_1_SIZE);
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@ -167,9 +174,9 @@ int dram_init (void)
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gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
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gd->bd->bi_dram[1].size = get_ram_size((volatile void *)PHYS_SDRAM_2,
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PHYS_SDRAM_2_SIZE);
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#endif
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#else
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return 0;
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#endif
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}
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int checkboard(void)
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@ -225,6 +225,7 @@ U_BOOT_CMD(
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);
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#endif
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#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
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int dram_init(void)
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{
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int i;
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@ -234,8 +235,31 @@ int dram_init(void)
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gd->bd->bi_dram[i].size = get_ram_size((long *)kw_sdram_bar(i),
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kw_sdram_bs(i));
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}
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return 0;
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}
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#else
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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/* Fix this */
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gd->ram_size = get_ram_size((volatile void *)kw_sdram_bar(0),
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kw_sdram_bs(0));
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return 0;
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}
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void dram_init_banksize(void)
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{
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int i;
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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gd->bd->bi_dram[i].start = kw_sdram_bar(i);
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gd->bd->bi_dram[i].size = kw_sdram_bs(i);
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gd->bd->bi_dram[i].size = get_ram_size((long *)kw_sdram_bar(i),
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kw_sdram_bs(i));
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}
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}
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#endif
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/* Configure and enable MV88E1118 PHY */
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void reset_phy(void)
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@ -1 +1 @@
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TEXT_BASE = 0xA7F00000
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TEXT_BASE = 0xc0000000
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@ -66,19 +66,22 @@ int board_init (void)
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int dram_init (void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE,
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PHYS_SDRAM_1_SIZE);
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return 0;
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}
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#if CONFIG_NR_DRAM_BANKS > 0
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = get_ram_size((volatile void *)PHYS_SDRAM_1,
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_dram[0].size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE,
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PHYS_SDRAM_1_SIZE);
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#endif
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#if CONFIG_NR_DRAM_BANKS > 1
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gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
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gd->bd->bi_dram[1].size = get_ram_size((volatile void *)PHYS_SDRAM_2,
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PHYS_SDRAM_2_SIZE);
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#endif
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return 0;
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}
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int checkboard(void)
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@ -43,6 +43,29 @@ CONFIG_SYS_ARM_WITHOUT_RELOC defined!!!
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-------------------------------------------------------------------------------------
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For boards which boot from nand_spl, it is possible to save a copy
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if TEXT_BASE == relocation address! This prevents that uboot code
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is copied again in relocate_code().
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example for the tx25 board:
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a) cpu starts
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b) it copies the first page in nand to internal ram
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(nand_spl_code)
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c) end executes this code
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d) this initialize CPU, RAM, ... and copy itself to RAM
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(this bin must fit in one page, so board_init_f()
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don;t fit in it ... )
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e) there it copy u-boot to CONFIG_SYS_NAND_U_BOOT_DST and
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starts this image @ CONFIG_SYS_NAND_U_BOOT_START
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f) u-boot code steps through board_init_f() and calculates
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the relocation address and copy itself to it
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If TEXT_BASE == relocation address, the copying of u-boot
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in f) could be saved.
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-------------------------------------------------------------------------------------
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ToDo:
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- fill in bd_t infos (check)
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@ -39,7 +39,6 @@
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#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
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/*
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* Memory Info
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@ -137,4 +136,9 @@
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#undef CONFIG_CMD_ENV
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#endif
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/* additions for new relocation code, must added to all boards */
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#undef CONFIG_SYS_ARM_WITHOUT_RELOC /* This board is tested with relocation support */
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#define CONFIG_SYS_SDRAM_BASE 0xc0000000
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
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CONFIG_SYS_GBL_DATA_SIZE)
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#endif /* __CONFIG_H */
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@ -235,4 +235,9 @@
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"mtdids=" MTDIDS_DEFAULT "\0" \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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/* additions for new relocation code, must added to all boards */
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#undef CONFIG_SYS_ARM_WITHOUT_RELOC /* This board is tested with relocation support */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
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CONFIG_SYS_GBL_DATA_SIZE)
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#endif /* __IMX27LITE_COMMON_CONFIG_H */
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@ -180,4 +180,8 @@ int get_scl (void);
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#undef CONFIG_JFFS2_CMDLINE
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#endif
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/* additions for new relocation code, must added to all boards */
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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#define CONFIG_SYS_INIT_SP_ADDR (0x00000000 + 0x1000 - /* Fix this */ \
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CONFIG_SYS_GBL_DATA_SIZE)
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#endif /* _CONFIG_KM_ARM_H */
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@ -40,9 +40,9 @@
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/* Start copying real U-boot from the second page */
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x30000
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/* Load U-Boot to this address */
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST 0x81f00000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
|
||||
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST (0x81fc0000)
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
|
||||
|
||||
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
|
||||
#define CONFIG_SYS_NAND_SPARE_SIZE 64
|
||||
@ -52,7 +52,6 @@
|
||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
|
||||
#else
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_SKIP_RELOCATE_UBOOT
|
||||
#endif
|
||||
|
||||
#define CONFIG_DISPLAY_CPUINFO
|
||||
@ -177,4 +176,10 @@
|
||||
"update=nand erase 0 40000;nand write ${loadaddr} 0 40000\0" \
|
||||
"upd=run load update\0" \
|
||||
|
||||
/* additions for new relocation code, must added to all boards */
|
||||
#undef CONFIG_SYS_ARM_WITHOUT_RELOC /* This board is tested with relocation support */
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
|
||||
CONFIG_SYS_GBL_DATA_SIZE)
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
@ -41,11 +41,23 @@ SECTIONS
|
||||
.rodata : { *(.rodata) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : { *(.data) }
|
||||
.data : {
|
||||
*(.data)
|
||||
__datarel_start = .;
|
||||
*(.data.rel)
|
||||
__datarelrolocal_start = .;
|
||||
*(.data.rel.ro.local)
|
||||
__datarellocal_start = .;
|
||||
*(.data.rel.local)
|
||||
__datarelro_start = .;
|
||||
*(.data.rel.ro)
|
||||
}
|
||||
|
||||
__got_start = .;
|
||||
. = ALIGN(4);
|
||||
.got : { *(.got) }
|
||||
|
||||
__got_end = .;
|
||||
. = .;
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
|
Loading…
Reference in New Issue
Block a user