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https://github.com/u-boot/u-boot.git
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arm64: imx: imx8mp-beacon: Migrate to OF_UPSTREAM
The imx8mp-beacon boards can migrate to OF_UPSTREAM which also allows for the removal the device tree files. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
This commit is contained in:
Adam Ford
Fabio Estevam
parent
cdfcc37428
commit
a8671bd9c5
@ -1091,7 +1091,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
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imx8mn-beacon-kit.dtb \
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imx8mq-mnt-reform2.dtb \
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imx8mq-phanbell.dtb \
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imx8mp-beacon-kit.dtb \
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imx8mp-data-modul-edm-sbc.dtb \
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imx8mp-dhcom-som-overlay-rev100.dtbo \
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imx8mp-dhcom-som-overlay-eth1xfast.dtbo \
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@ -1,783 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks
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*/
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/dts-v1/;
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#include <dt-bindings/usb/pd.h>
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#include <dt-bindings/phy/phy-imx8-pcie.h>
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#include "imx8mp.dtsi"
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#include "imx8mp-beacon-som.dtsi"
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/ {
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model = "Beacon EmbeddedWorks i.MX8MPlus Development kit";
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compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp";
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aliases {
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ethernet0 = &eqos;
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ethernet1 = &fec;
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};
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chosen {
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stdout-path = &uart2;
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};
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clk_xtal25: clock-xtal25 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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};
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connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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data-role = "dual";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hs_ep: endpoint {
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remote-endpoint = <&usb3_hs_ep>;
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};
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};
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port@1 {
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reg = <1>;
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ss_ep: endpoint {
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remote-endpoint = <&hd3ss3220_in_ep>;
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};
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};
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};
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};
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dmic_codec: dmic-codec {
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compatible = "dmic-codec";
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num-channels = <1>;
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#sound-dai-cells = <0>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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autorepeat;
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button-0 {
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label = "btn0";
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linux,code = <BTN_0>;
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gpios = <&pca6416_1 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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wakeup-source;
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};
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button-1 {
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label = "btn1";
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linux,code = <BTN_1>;
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gpios = <&pca6416_1 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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wakeup-source;
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};
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button-2 {
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label = "btn2";
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linux,code = <BTN_2>;
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gpios = <&pca6416_1 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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wakeup-source;
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};
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button-3 {
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label = "btn3";
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linux,code = <BTN_3>;
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gpios = <&pca6416_1 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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wakeup-source;
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};
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};
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bridge-connector {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con: endpoint {
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remote-endpoint = <&adv7535_out>;
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};
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_led3>;
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led-0 {
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label = "gen_led0";
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gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-1 {
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label = "gen_led1";
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gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-2 {
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label = "gen_led2";
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gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-3 {
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label = "heartbeat";
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gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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reg_audio: regulator-wm8962 {
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compatible = "regulator-fixed";
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regulator-name = "3v3_aud";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usdhc2_vmmc: regulator-usdhc2 {
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compatible = "regulator-fixed";
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regulator-name = "VSD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <100>;
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off-on-delay-us = <20000>;
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};
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reg_usb1_host_vbus: regulator-usb1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb1_host_vbus";
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regulator-max-microvolt = <5000000>;
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regulator-min-microvolt = <5000000>;
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gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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sound-adv7535 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "sound-adv7535";
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simple-audio-card,format = "i2s";
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simple-audio-card,cpu {
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sound-dai = <&sai5>;
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system-clock-direction-out;
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};
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simple-audio-card,codec {
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sound-dai = <&adv_bridge>;
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};
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};
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sound-dmic {
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compatible = "simple-audio-card";
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simple-audio-card,name = "sound-pdm";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&dailink_master>;
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simple-audio-card,frame-master = <&dailink_master>;
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dailink_master: simple-audio-card,cpu {
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sound-dai = <&micfil>;
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};
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simple-audio-card,codec {
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sound-dai = <&dmic_codec>;
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};
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};
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sound-wm8962 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "wm8962";
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simple-audio-card,format = "i2s";
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simple-audio-card,widgets = "Headphone", "Headphones",
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"Microphone", "Headset Mic",
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"Speaker", "Speaker";
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simple-audio-card,routing = "Headphones", "HPOUTL",
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"Headphones", "HPOUTR",
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"Speaker", "SPKOUTL",
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"Speaker", "SPKOUTR",
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"Headset Mic", "MICBIAS",
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"IN3R", "Headset Mic";
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simple-audio-card,cpu {
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sound-dai = <&sai3>;
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};
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simple-audio-card,codec {
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sound-dai = <&wm8962>;
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clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
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frame-master;
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bitclock-master;
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};
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};
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};
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&audio_blk_ctrl {
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assigned-clocks = <&clk IMX8MP_AUDIO_PLL1>, <&clk IMX8MP_AUDIO_PLL2>;
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assigned-clock-rates = <393216000>, <135475200>;
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};
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
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status = "okay";
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tpm: tpm@0 {
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compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
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reg = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tpm>;
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reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
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spi-max-frequency = <18500000>;
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy1>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy1: ethernet-phy@3 {
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compatible = "ethernet-phy-id0022.1640",
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"ethernet-phy-ieee802.3-c22";
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reg = <3>;
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reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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reset-deassert-us = <150000>;
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interrupt-parent = <&gpio4>;
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interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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};
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&flexcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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status = "okay";
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};
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&gpio2 {
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usb-mux-hog {
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gpio-hog;
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gpios = <20 0>;
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output-low;
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line-name = "USB-C Mux En";
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};
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};
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&i2c2 {
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clock-frequency = <384000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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pca6416_3: gpio@20 {
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compatible = "nxp,pcal6416";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio4>;
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interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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adv_bridge: hdmi@3d {
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compatible = "adi,adv7535";
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reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>;
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reg-names = "main", "cec", "edid", "packet";
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adi,dsi-lanes = <4>;
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#sound-dai-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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adv7535_in: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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port@1 {
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reg = <1>;
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adv7535_out: endpoint {
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remote-endpoint = <&hdmi_con>;
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};
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};
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};
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};
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pcieclk: clock-generator@68 {
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compatible = "renesas,9fgv0241";
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reg = <0x68>;
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clocks = <&clk_xtal25>;
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#clock-cells = <1>;
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};
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};
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&i2c3 {
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/* Connected to USB Hub */
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usb-typec@52 {
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compatible = "nxp,ptn5110";
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reg = <0x52>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_typec>;
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interrupt-parent = <&gpio4>;
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interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
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connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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power-role = "source";
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data-role = "host";
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source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
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};
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};
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};
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c4>;
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clock-frequency = <384000>;
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status = "okay";
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wm8962: audio-codec@1a {
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compatible = "wlf,wm8962";
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reg = <0x1a>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wm8962>;
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clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
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assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
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assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
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assigned-clock-rates = <22576000>;
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DCVDD-supply = <®_audio>;
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DBVDD-supply = <®_audio>;
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AVDD-supply = <®_audio>;
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CPVDD-supply = <®_audio>;
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MICVDD-supply = <®_audio>;
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PLLVDD-supply = <®_audio>;
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SPKVDD1-supply = <®_audio>;
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SPKVDD2-supply = <®_audio>;
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gpio-cfg = <
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0x0000 /* 0:Default */
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0x0000 /* 1:Default */
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0x0000 /* 2:FN_DMICCLK */
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0x0000 /* 3:Default */
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0x0000 /* 4:FN_DMICCDAT */
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0x0000 /* 5:Default */
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>;
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#sound-dai-cells = <0>;
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};
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pca6416: gpio@20 {
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compatible = "nxp,pcal6416";
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reg = <0x20>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcal6414>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio4>;
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interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pca6416_1: gpio@21 {
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compatible = "nxp,pcal6416";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio4>;
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interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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usb-hub-hog {
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gpio-hog;
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gpios = <7 0>;
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output-low;
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line-name = "USB Hub Enable";
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};
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};
|
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usb-typec@47 {
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compatible = "ti,hd3ss3220";
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reg = <0x47>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hd3ss3220>;
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interrupt-parent = <&gpio4>;
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interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hd3ss3220_in_ep: endpoint {
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remote-endpoint = <&ss_ep>;
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};
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};
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port@1 {
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reg = <1>;
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hd3ss3220_out_ep: endpoint {
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remote-endpoint = <&usb3_role_switch>;
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};
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};
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};
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};
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};
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&lcdif1 {
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status = "okay";
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};
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&micfil {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pdm>;
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assigned-clocks = <&clk IMX8MP_CLK_PDM>;
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assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <49152000>;
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status = "okay";
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};
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&mipi_dsi {
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samsung,esc-clock-frequency = <10000000>;
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status = "okay";
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ports {
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port@1 {
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reg = <1>;
|
||||
|
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dsi_out: endpoint {
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remote-endpoint = <&adv7535_in>;
|
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};
|
||||
};
|
||||
};
|
||||
};
|
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|
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&pcie {
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pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
|
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status = "okay";
|
||||
};
|
||||
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||||
&pcie_phy {
|
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fsl,clkreq-unsupported;
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
||||
clocks = <&pcieclk 1>;
|
||||
clock-names = "ref";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sai3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sai3>;
|
||||
assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
|
||||
<&clk IMX8MP_AUDIO_PLL2> ;
|
||||
assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
|
||||
assigned-clock-rates = <12288000>, <361267200>;
|
||||
fsl,sai-mclk-direction-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sai5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sai5>;
|
||||
assigned-clocks = <&clk IMX8MP_CLK_SAI5>;
|
||||
assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
|
||||
assigned-clock-rates = <12288000>;
|
||||
fsl,sai-mclk-direction-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&snvs_pwrkey {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
assigned-clocks = <&clk IMX8MP_CLK_UART3>;
|
||||
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3_0 {
|
||||
dr_mode = "otg";
|
||||
hnp-disable;
|
||||
srp-disable;
|
||||
adp-disable;
|
||||
usb-role-switch;
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
usb3_hs_ep: endpoint {
|
||||
remote-endpoint = <&hs_ep>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
usb3_role_switch: endpoint {
|
||||
remote-endpoint = <&hd3ss3220_out_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&usb3_phy0 {
|
||||
vbus-supply = <®_usb1_host_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3_1 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_usdhc2_vmmc>;
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_ecspi2: ecspi2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82
|
||||
MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82
|
||||
MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82
|
||||
MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_fec: fecgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2
|
||||
MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2
|
||||
MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90
|
||||
MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90
|
||||
MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90
|
||||
MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90
|
||||
MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90
|
||||
MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90
|
||||
MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16
|
||||
MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16
|
||||
MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16
|
||||
MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16
|
||||
MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16
|
||||
MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16
|
||||
MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x140
|
||||
MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x10
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexcan1: flexcan1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154
|
||||
MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_hd3ss3220: hd3ss3220grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c4: i2c4grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_led3: led3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcal6414: pcal6414-gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x10
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x10 /* PCIe_nDIS */
|
||||
MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x10 /* PCIe_nRST */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pdm: pdmgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI5_RXC__AUDIOMIX_PDM_CLK 0xd6
|
||||
MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_PDM_BIT_STREAM00 0xd6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_sai3: sai3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6
|
||||
MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6
|
||||
MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6
|
||||
MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6
|
||||
MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK 0xd6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_sai5: sai5grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_SAI5_TX_DATA00 0xd6
|
||||
MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK 0xd6
|
||||
MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI5_TX_SYNC 0xd6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_tpm: tpmgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19 /* Reset */
|
||||
MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x1d6 /* IRQ */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_typec: typec1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0xc4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140
|
||||
MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS 0x140
|
||||
MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wm8962: wm8962grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1 0x59
|
||||
>;
|
||||
};
|
||||
};
|
||||
@ -1,487 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2023 LogicPD, Inc. dba Beacon EmbeddedWorks
|
||||
*/
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
rtc0 = &rtc;
|
||||
rtc1 = &snvs_rtc;
|
||||
};
|
||||
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000 0 0xc0000000>,
|
||||
<0x1 0x00000000 0 0xc0000000>;
|
||||
};
|
||||
|
||||
reg_wl_bt: regulator-wifi-bt {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_wl_bt>;
|
||||
regulator-name = "wl-bt-pow-dwn";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&gpio2 6 GPIO_ACTIVE_LOW>;
|
||||
startup-delay-us = <70000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&A53_0 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_1 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_2 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_3 {
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&eqos {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_eqos>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <ðphy0>;
|
||||
snps,force_thresh_dma_mode;
|
||||
snps,mtl-rx-config = <&mtl_rx_setup>;
|
||||
snps,mtl-tx-config = <&mtl_tx_setup>;
|
||||
status = "okay";
|
||||
|
||||
mdio {
|
||||
compatible = "snps,dwmac-mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethphy0: ethernet-phy@3 {
|
||||
compatible = "ethernet-phy-id0022.1640",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <3>;
|
||||
reset-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
mtl_rx_setup: rx-queues-config {
|
||||
snps,rx-queues-to-use = <5>;
|
||||
snps,rx-sched-sp;
|
||||
|
||||
queue0 {
|
||||
snps,dcb-algorithm;
|
||||
snps,priority = <0x1>;
|
||||
snps,map-to-dma-channel = <0>;
|
||||
};
|
||||
|
||||
queue1 {
|
||||
snps,dcb-algorithm;
|
||||
snps,priority = <0x2>;
|
||||
snps,map-to-dma-channel = <1>;
|
||||
};
|
||||
|
||||
queue2 {
|
||||
snps,dcb-algorithm;
|
||||
snps,priority = <0x4>;
|
||||
snps,map-to-dma-channel = <2>;
|
||||
};
|
||||
|
||||
queue3 {
|
||||
snps,dcb-algorithm;
|
||||
snps,priority = <0x8>;
|
||||
snps,map-to-dma-channel = <3>;
|
||||
};
|
||||
|
||||
queue4 {
|
||||
snps,dcb-algorithm;
|
||||
snps,priority = <0xf0>;
|
||||
snps,map-to-dma-channel = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
mtl_tx_setup: tx-queues-config {
|
||||
snps,tx-queues-to-use = <5>;
|
||||
snps,tx-sched-sp;
|
||||
|
||||
queue0 {
|
||||
snps,dcb-algorithm;
|
||||
snps,priority = <0x1>;
|
||||
};
|
||||
|
||||
queue1 {
|
||||
snps,dcb-algorithm;
|
||||
snps,priority = <0x2>;
|
||||
};
|
||||
|
||||
queue2 {
|
||||
snps,dcb-algorithm;
|
||||
snps,priority = <0x4>;
|
||||
};
|
||||
|
||||
queue3 {
|
||||
snps,dcb-algorithm;
|
||||
snps,priority = <0x8>;
|
||||
};
|
||||
|
||||
queue4 {
|
||||
snps,dcb-algorithm;
|
||||
snps,priority = <0xf0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&flexspi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flexspi0>;
|
||||
status = "okay";
|
||||
|
||||
flash0: flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <80000000>;
|
||||
spi-tx-bus-width = <1>;
|
||||
spi-rx-bus-width = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
clock-frequency = <384000>;
|
||||
status = "okay";
|
||||
|
||||
pmic@25 {
|
||||
compatible = "nxp,pca9450c";
|
||||
reg = <0x25>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
regulators {
|
||||
buck1: BUCK1 {
|
||||
regulator-name = "BUCK1";
|
||||
regulator-min-microvolt = <600000>;
|
||||
regulator-max-microvolt = <2187500>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <3125>;
|
||||
};
|
||||
|
||||
buck2: BUCK2 {
|
||||
regulator-name = "BUCK2";
|
||||
regulator-min-microvolt = <600000>;
|
||||
regulator-max-microvolt = <2187500>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <3125>;
|
||||
nxp,dvs-run-voltage = <950000>;
|
||||
nxp,dvs-standby-voltage = <850000>;
|
||||
};
|
||||
|
||||
buck4: BUCK4 {
|
||||
regulator-name = "BUCK4";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck5: BUCK5 {
|
||||
regulator-name = "BUCK5";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck6: BUCK6 {
|
||||
regulator-name = "BUCK6";
|
||||
regulator-min-microvolt = <600000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1: LDO1 {
|
||||
regulator-name = "LDO1";
|
||||
regulator-min-microvolt = <1600000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3: LDO3 {
|
||||
regulator-name = "LDO3";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4: LDO4 {
|
||||
regulator-name = "LDO4";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo5: LDO5 {
|
||||
regulator-name = "LDO5";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
clock-frequency = <384000>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
pagesize = <32>;
|
||||
read-only; /* Manufacturing EEPROM programmed at factory */
|
||||
};
|
||||
|
||||
rtc: rtc@51 {
|
||||
compatible = "nxp,pcf85263";
|
||||
reg = <0x51>;
|
||||
};
|
||||
};
|
||||
|
||||
&snvs_pwrkey {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
assigned-clocks = <&clk IMX8MP_CLK_UART1>;
|
||||
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "nxp,88w8997-bt";
|
||||
};
|
||||
};
|
||||
|
||||
&usdhc1 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
||||
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <®_wl_bt>;
|
||||
cap-sd-highspeed;
|
||||
sd-uhs-sdr50;
|
||||
sd-uhs-sdr104;
|
||||
keep-power-in-suspend;
|
||||
wakeup-source;
|
||||
non-removable;
|
||||
cap-power-off-card;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
mwifiex: wifi@1 {
|
||||
compatible = "marvell,sd8997";
|
||||
reg = <1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wlan>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_eqos: eqosgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2
|
||||
MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2
|
||||
MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90
|
||||
MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90
|
||||
MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90
|
||||
MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90
|
||||
MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90
|
||||
MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90
|
||||
MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16
|
||||
MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16
|
||||
MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16
|
||||
MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16
|
||||
MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16
|
||||
MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16
|
||||
MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x10
|
||||
MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x10
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexspi0: flexspi0grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK 0x1c2
|
||||
MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82
|
||||
MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x82
|
||||
MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x82
|
||||
MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x82
|
||||
MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x1c0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_wl_bt: reg-wl-btgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
|
||||
MX8MP_IOMUXC_UART3_RXD__UART1_DCE_CTS 0x140
|
||||
MX8MP_IOMUXC_UART3_TXD__UART1_DCE_RTS 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1: usdhc1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190
|
||||
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x194
|
||||
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d4
|
||||
MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x196
|
||||
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d6
|
||||
MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wlan: wlangrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD1_DATA7__GPIO2_IO09 0x140
|
||||
>;
|
||||
};
|
||||
};
|
||||
@ -188,6 +188,7 @@ config TARGET_IMX8MP_BEACON
|
||||
select FSL_CAAM
|
||||
select ARCH_MISC_INIT
|
||||
select SPL_CRYPTO if SPL
|
||||
imply OF_UPSTREAM
|
||||
|
||||
config TARGET_IMX8MP_DEBIX_MODEL_A
|
||||
bool "Polyhex i.MX8M Plus Debix Model A SBC"
|
||||
|
||||
@ -12,7 +12,7 @@ CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_ENV_SIZE=0x2000
|
||||
CONFIG_ENV_OFFSET=0xFFFFDE00
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-beacon-kit"
|
||||
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-beacon-kit"
|
||||
CONFIG_SPL_TEXT_BASE=0x920000
|
||||
CONFIG_TARGET_IMX8MP_BEACON=y
|
||||
CONFIG_SYS_MONITOR_LEN=524288
|
||||
|
||||
Loading…
Reference in New Issue
Block a user