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rtc: pl031: convert the driver to driver model
With this patch, PL031 driver is converted to driver-model-compliant driver. In addition, CONFIG_SYS_RTC_PL031_BASE is no longer valid. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
AKASHI Takahiro
Alexander Graf
parent
24638a1f21
commit
a370e429a7
@ -8,13 +8,11 @@
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#include <common.h>
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#include <command.h>
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#include <dm.h>
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#include <errno.h>
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#include <rtc.h>
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#if defined(CONFIG_CMD_DATE)
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#ifndef CONFIG_SYS_RTC_PL031_BASE
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#error CONFIG_SYS_RTC_PL031_BASE is not defined!
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#endif
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#include <asm/io.h>
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#include <asm/types.h>
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/*
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* Register definitions
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@ -30,78 +28,114 @@
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#define RTC_CR_START (1 << 0)
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#define RTC_WRITE_REG(addr, val) \
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(*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE + (addr)) = (val))
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#define RTC_READ_REG(addr) \
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(*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE + (addr)))
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struct pl031_platdata {
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phys_addr_t base;
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};
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static int pl031_initted = 0;
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/* Enable RTC Start in Control register*/
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void rtc_init(void)
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static inline u32 pl031_read_reg(struct udevice *dev, int reg)
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{
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RTC_WRITE_REG(RTC_CR, RTC_CR_START);
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struct pl031_platdata *pdata = dev_get_platdata(dev);
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pl031_initted = 1;
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return readl(pdata->base + reg);
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}
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static inline u32 pl031_write_reg(struct udevice *dev, int reg, u32 value)
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{
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struct pl031_platdata *pdata = dev_get_platdata(dev);
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return writel(value, pdata->base + reg);
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}
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/*
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* Reset the RTC. We set the date back to 1970-01-01.
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* Probe RTC device
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*/
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void rtc_reset(void)
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static int pl031_probe(struct udevice *dev)
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{
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RTC_WRITE_REG(RTC_LR, 0x00);
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if(!pl031_initted)
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rtc_init();
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}
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/* Enable RTC Start in Control register*/
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pl031_write_reg(dev, RTC_CR, RTC_CR_START);
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/*
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* Set the RTC
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*/
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int rtc_set(struct rtc_time *tmp)
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{
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unsigned long tim;
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if(!pl031_initted)
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rtc_init();
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if (tmp == NULL) {
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puts("Error setting the date/time\n");
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return -1;
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}
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/* Calculate number of seconds this incoming time represents */
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tim = rtc_mktime(tmp);
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RTC_WRITE_REG(RTC_LR, tim);
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return -1;
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return 0;
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}
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/*
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* Get the current time from the RTC
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*/
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int rtc_get(struct rtc_time *tmp)
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static int pl031_get(struct udevice *dev, struct rtc_time *tm)
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{
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ulong tim;
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unsigned long tim;
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if(!pl031_initted)
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rtc_init();
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if (!tm)
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return -EINVAL;
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if (tmp == NULL) {
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puts("Error getting the date/time\n");
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return -1;
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}
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tim = pl031_read_reg(dev, RTC_DR);
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tim = RTC_READ_REG(RTC_DR);
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rtc_to_tm(tim, tm);
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rtc_to_tm(tim, tmp);
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debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
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tm->tm_hour, tm->tm_min, tm->tm_sec);
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return 0;
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}
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#endif
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/*
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* Set the RTC
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*/
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static int pl031_set(struct udevice *dev, const struct rtc_time *tm)
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{
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unsigned long tim;
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if (!tm)
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return -EINVAL;
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debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
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tm->tm_hour, tm->tm_min, tm->tm_sec);
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/* Calculate number of seconds this incoming time represents */
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tim = rtc_mktime(tm);
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pl031_write_reg(dev, RTC_LR, tim);
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return 0;
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}
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/*
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* Reset the RTC. We set the date back to 1970-01-01.
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*/
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static int pl031_reset(struct udevice *dev)
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{
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pl031_write_reg(dev, RTC_LR, 0);
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return 0;
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}
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static const struct rtc_ops pl031_ops = {
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.get = pl031_get,
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.set = pl031_set,
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.reset = pl031_reset,
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};
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static const struct udevice_id pl031_ids[] = {
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{ .compatible = "arm,pl031" },
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{ }
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};
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static int pl031_ofdata_to_platdata(struct udevice *dev)
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{
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struct pl031_platdata *pdata = dev_get_platdata(dev);
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pdata->base = dev_read_addr(dev);
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return 0;
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}
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U_BOOT_DRIVER(rtc_pl031) = {
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.name = "rtc-pl031",
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.id = UCLASS_RTC,
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.of_match = pl031_ids,
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.probe = pl031_probe,
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.ofdata_to_platdata = pl031_ofdata_to_platdata,
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.platdata_auto_alloc_size = sizeof(struct pl031_platdata),
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.ops = &pl031_ops,
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};
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@ -23,9 +23,6 @@
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/* For block devices, QEMU emulates an ICH9 AHCI controller over PCI */
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 6
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/* QEMU emulates the ARM AMBA PL031 RTC */
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#define CONFIG_SYS_RTC_PL031_BASE 0x09010000
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/* Environment options */
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#define CONFIG_ENV_SIZE SZ_64K
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@ -4070,7 +4070,6 @@ CONFIG_SYS_RSTC_RMR_VAL
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CONFIG_SYS_RTC_BUS_NUM
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CONFIG_SYS_RTC_CNT
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CONFIG_SYS_RTC_OSCILLATOR
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CONFIG_SYS_RTC_PL031_BASE
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CONFIG_SYS_RTC_REG_BASE_ADDR
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CONFIG_SYS_RTC_SETUP
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CONFIG_SYS_RV3029_TCR
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