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fpga: xilinx: virtex2: Fix macro indentation
No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -47,10 +47,10 @@ extern struct xilinx_fpga_op virtex2_op;
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/* Device Image Sizes (in bytes)
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*********************************************************************/
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#define XILINX_XC2V40_SIZE (338208 / 8)
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#define XILINX_XC2V80_SIZE (597408 / 8)
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#define XILINX_XC2V250_SIZE (1591584 / 8)
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#define XILINX_XC2V500_SIZE (2557857 / 8)
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#define XILINX_XC2V40_SIZE (338208 / 8)
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#define XILINX_XC2V80_SIZE (597408 / 8)
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#define XILINX_XC2V250_SIZE (1591584 / 8)
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#define XILINX_XC2V500_SIZE (2557857 / 8)
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#define XILINX_XC2V1000_SIZE (3749408 / 8)
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#define XILINX_XC2V1500_SIZE (5166240 / 8)
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#define XILINX_XC2V2000_SIZE (6808352 / 8)
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