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https://github.com/u-boot/u-boot.git
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arm: Rename STM32MP15x
CONFIG options must not use lower-case letter. Convert this and related ones to upper case. Signed-off-by: Simon Glass <sjg@chromium.org Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This commit is contained in:
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49de864a25
commit
9f1dc110cc
@ -1364,7 +1364,7 @@ dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
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dtb-$(CONFIG_STM32MP13X) += \
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stm32mp135f-dk.dtb
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dtb-$(CONFIG_STM32MP15x) += \
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dtb-$(CONFIG_STM32MP15X) += \
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stm32mp157a-dk1.dtb \
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stm32mp157a-dk1-scmi.dtb \
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stm32mp157a-icore-stm32mp1-ctouch2.dtb \
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@ -206,7 +206,7 @@
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resets = <&rcc UART8_R>;
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};
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#if defined(CONFIG_STM32MP15x_STM32IMAGE)
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#if defined(CONFIG_STM32MP15X_STM32IMAGE)
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&binman {
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u-boot-stm32 {
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filename = "u-boot.stm32";
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@ -22,13 +22,13 @@
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st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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};
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#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL)
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#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
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config {
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u-boot,mmc-env-partition = "ssbl";
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};
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#endif
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#ifdef CONFIG_STM32MP15x_STM32IMAGE
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#ifdef CONFIG_STM32MP15X_STM32IMAGE
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/* only needed for boot with TF-A, witout FIP support */
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firmware {
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optee {
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@ -20,13 +20,13 @@
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st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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};
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#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL)
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#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
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config {
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u-boot,mmc-env-partition = "ssbl";
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};
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#endif
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#ifdef CONFIG_STM32MP15x_STM32IMAGE
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#ifdef CONFIG_STM32MP15X_STM32IMAGE
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/* only needed for boot with TF-A, witout FIP support */
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firmware {
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optee {
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@ -28,7 +28,7 @@
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#address-cells = <1>;
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#size-cells = <1>;
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#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL)
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#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
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partition@0 {
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label = "fsbl1";
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reg = <0x00000000 0x00040000>;
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@ -82,7 +82,7 @@
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#address-cells = <1>;
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#size-cells = <1>;
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#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL)
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#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
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partition@0 {
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label = "fsbl";
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reg = <0x00000000 0x00200000>;
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@ -35,7 +35,7 @@ config ENV_SIZE
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choice
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prompt "Select STMicroelectronics STM32MPxxx Soc"
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default STM32MP15x
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default STM32MP15X
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config STM32MP13X
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bool "Support STMicroelectronics STM32MP13x Soc"
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@ -55,7 +55,7 @@ config STM32MP13X
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support of STMicroelectronics SOC STM32MP13x family
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STMicroelectronics MPU with core ARMv7
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config STM32MP15x
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config STM32MP15X
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bool "Support STMicroelectronics STM32MP15x Soc"
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select ARCH_SUPPORT_PSCI
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select BINMAN
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@ -127,7 +127,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
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config STM32_ETZPC
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bool "STM32 Extended TrustZone Protection"
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depends on STM32MP15x || STM32MP13X
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depends on STM32MP15X || STM32MP13X
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default y
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imply BOOTP_SERVERIP
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help
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@ -1,6 +1,6 @@
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if STM32MP15x
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if STM32MP15X
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config STM32MP15x_STM32IMAGE
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config STM32MP15X_STM32IMAGE
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bool "Support STM32 image for generated U-Boot image"
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depends on TFABOOT
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help
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@ -11,7 +11,7 @@ choice
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prompt "STM32MP15x board select"
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optional
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config TARGET_ST_STM32MP15x
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config TARGET_ST_STM32MP15X
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bool "STMicroelectronics STM32MP15x boards"
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imply BOOTSTAGE
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imply CMD_BOOTSTAGE
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@ -8,7 +8,7 @@ obj-y += syscon.o
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obj-y += bsec.o
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obj-y += soc.o
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obj-$(CONFIG_STM32MP15x) += stm32mp1/
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obj-$(CONFIG_STM32MP15X) += stm32mp1/
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obj-$(CONFIG_STM32MP13X) += stm32mp1/
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obj-$(CONFIG_STM32MP25X) += stm32mp2/
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@ -20,7 +20,7 @@
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*/
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#define STM32_OTP_CLOSE_ID 0
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#define STM32_OTP_STM32MP13X_CLOSE_MASK 0x3F
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#define STM32_OTP_STM32MP15x_CLOSE_MASK BIT(6)
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#define STM32_OTP_STM32MP15X_CLOSE_MASK BIT(6)
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/* PKH is the first element of the key list */
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#define STM32KEY_PKH 0
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@ -64,7 +64,7 @@ static u8 get_key_nb(void)
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if (IS_ENABLED(CONFIG_STM32MP13X))
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return ARRAY_SIZE(stm32mp13_list);
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if (IS_ENABLED(CONFIG_STM32MP15x))
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if (IS_ENABLED(CONFIG_STM32MP15X))
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return ARRAY_SIZE(stm32mp15_list);
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}
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@ -73,7 +73,7 @@ static const struct stm32key *get_key(u8 index)
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if (IS_ENABLED(CONFIG_STM32MP13X))
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return &stm32mp13_list[index];
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if (IS_ENABLED(CONFIG_STM32MP15x))
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if (IS_ENABLED(CONFIG_STM32MP15X))
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return &stm32mp15_list[index];
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}
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@ -82,8 +82,8 @@ static u32 get_otp_close_mask(void)
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if (IS_ENABLED(CONFIG_STM32MP13X))
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return STM32_OTP_STM32MP13X_CLOSE_MASK;
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if (IS_ENABLED(CONFIG_STM32MP15x))
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return STM32_OTP_STM32MP15x_CLOSE_MASK;
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if (IS_ENABLED(CONFIG_STM32MP15X))
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return STM32_OTP_STM32MP15X_CLOSE_MASK;
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}
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static int get_misc_dev(struct udevice **dev)
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@ -23,14 +23,14 @@
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#define CMD_SIZE 512
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/* SMC is only supported in SPMIN for STM32MP15x */
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#ifdef CONFIG_STM32MP15x
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#ifdef CONFIG_STM32MP15X
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#define OTP_SIZE_SMC 1024
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#else
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#define OTP_SIZE_SMC 0
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#endif
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/* size of the OTP struct in NVMEM PTA */
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#define _OTP_SIZE_TA(otp) (((otp) * 2 + 2) * 4)
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#if defined(CONFIG_STM32MP13X) || defined(CONFIG_STM32MP15x)
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#if defined(CONFIG_STM32MP13X) || defined(CONFIG_STM32MP15X)
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/* STM32MP1 with BSEC2 */
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#define OTP_SIZE_TA _OTP_SIZE_TA(96)
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#else
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@ -71,11 +71,11 @@ enum forced_boot_mode {
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* only address used before device tree parsing
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*/
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#if defined(CONFIG_STM32MP15x) || defined(CONFIG_STM32MP13X)
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#if defined(CONFIG_STM32MP15X) || defined(CONFIG_STM32MP13X)
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#define STM32_RCC_BASE 0x50000000
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#define STM32_PWR_BASE 0x50001000
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#define STM32_SYSCFG_BASE 0x50020000
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#ifdef CONFIG_STM32MP15x
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#ifdef CONFIG_STM32MP15X
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#define STM32_DBGMCU_BASE 0x50081000
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#endif
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#define STM32_FMC2_BASE 0x58002000
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@ -88,7 +88,7 @@ enum forced_boot_mode {
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#define STM32_STGEN_BASE 0x5C008000
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#define STM32_TAMP_BASE 0x5C00A000
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#ifdef CONFIG_STM32MP15x
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#ifdef CONFIG_STM32MP15X
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#define STM32_USART1_BASE 0x5C000000
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#define STM32_USART2_BASE 0x4000E000
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#endif
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@ -107,7 +107,7 @@ enum forced_boot_mode {
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#define STM32_SDMMC2_BASE 0x58007000
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#define STM32_SDMMC3_BASE 0x48004000
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#ifdef CONFIG_STM32MP15x
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#ifdef CONFIG_STM32MP15X
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#define STM32_SYSRAM_BASE 0x2FFC0000
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#define STM32_SYSRAM_SIZE SZ_256K
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#endif
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@ -129,7 +129,7 @@ enum forced_boot_mode {
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/* TAMP registers */
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#define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * x)
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#ifdef CONFIG_STM32MP15x
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#ifdef CONFIG_STM32MP15X
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#define TAMP_BACKUP_MAGIC_NUMBER TAMP_BACKUP_REGISTER(4)
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#define TAMP_BACKUP_BRANCH_ADDRESS TAMP_BACKUP_REGISTER(5)
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#define TAMP_FWU_BOOT_INFO_REG TAMP_BACKUP_REGISTER(10)
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@ -181,7 +181,7 @@ enum forced_boot_mode {
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#define STM32_BSEC_LOCK(id) (STM32_BSEC_LOCK_OFFSET + (id) * 4)
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/* BSEC OTP index */
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#ifdef CONFIG_STM32MP15x
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#ifdef CONFIG_STM32MP15X
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#define BSEC_OTP_RPN 1
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#define BSEC_OTP_SERIAL 13
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#define BSEC_OTP_PKG 16
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@ -6,7 +6,7 @@
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obj-y += cpu.o
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obj-$(CONFIG_STM32MP13X) += stm32mp13x.o
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obj-$(CONFIG_STM32MP15x) += stm32mp15x.o
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obj-$(CONFIG_STM32MP15X) += stm32mp15x.o
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obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o
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ifdef CONFIG_SPL_BUILD
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@ -275,7 +275,7 @@ static int stm32_fdt_fixup_etzpc(void *fdt, int soc_node)
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array_size = ARRAY_SIZE(stm32mp13_ip_addr);
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}
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if (IS_ENABLED(CONFIG_STM32MP15x)) {
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if (IS_ENABLED(CONFIG_STM32MP15X)) {
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array = stm32mp15_ip_addr;
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array_size = ARRAY_SIZE(stm32mp15_ip_addr);
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}
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@ -494,7 +494,7 @@ int ft_system_setup(void *blob, struct bd_info *bd)
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if (IS_ENABLED(CONFIG_STM32MP13X))
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stm32mp13_fdt_fixup(blob, soc, cpu, name);
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if (IS_ENABLED(CONFIG_STM32MP15x)) {
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if (IS_ENABLED(CONFIG_STM32MP15X)) {
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stm32mp15_fdt_fixup(blob, soc, cpu, name);
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/*
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@ -505,7 +505,7 @@ int ft_system_setup(void *blob, struct bd_info *bd)
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* under CONFIG_STM32MP15x_STM32IMAGE only for compatibility
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* when FIP is not used by TF-A
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*/
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if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE) &&
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if (IS_ENABLED(CONFIG_STM32MP15X_STM32IMAGE) &&
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!tee_find_device(NULL, NULL, NULL, NULL))
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stm32_fdt_disable_optee(blob);
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}
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@ -1,7 +1,7 @@
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config CMD_STBOARD
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bool "stboard - command for OTP board information"
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depends on ARCH_STM32MP
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default y if TARGET_ST_STM32MP25X || TARGET_ST_STM32MP15x || TARGET_ST_STM32MP13X
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default y if TARGET_ST_STM32MP25X || TARGET_ST_STM32MP15X || TARGET_ST_STM32MP13X
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help
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This compile the stboard command to
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read and write the board in the OTP.
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@ -1,4 +1,4 @@
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if TARGET_ST_STM32MP15x
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if TARGET_ST_STM32MP15X
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config SYS_BOARD
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default "stm32mp1"
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@ -114,7 +114,7 @@ int checkboard(void)
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int fdt_compat_len;
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if (IS_ENABLED(CONFIG_TFABOOT)) {
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if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE))
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if (IS_ENABLED(CONFIG_STM32MP15X_STM32IMAGE))
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mode = "trusted - stm32image";
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else
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mode = "trusted";
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@ -616,7 +616,7 @@ error:
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static bool board_is_stm32mp15x_dk2(void)
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{
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if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
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if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15X) &&
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of_machine_is_compatible("st,stm32mp157c-dk2"))
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return true;
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@ -625,7 +625,7 @@ static bool board_is_stm32mp15x_dk2(void)
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static bool board_is_stm32mp15x_ev1(void)
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{
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if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
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if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15X) &&
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(of_machine_is_compatible("st,stm32mp157a-ev1") ||
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of_machine_is_compatible("st,stm32mp157c-ev1") ||
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of_machine_is_compatible("st,stm32mp157d-ev1") ||
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CONFIG_SPL=y
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CONFIG_CMD_STM32KEY=y
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CONFIG_TYPEC_STUSB160X=y
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CONFIG_TARGET_ST_STM32MP15x=y
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CONFIG_TARGET_ST_STM32MP15X=y
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CONFIG_ENV_OFFSET_REDUND=0x2C0000
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CONFIG_CMD_STM32PROG=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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@ -9,7 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
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CONFIG_DDR_CACHEABLE_SIZE=0x8000000
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CONFIG_CMD_STM32KEY=y
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CONFIG_TYPEC_STUSB160X=y
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CONFIG_TARGET_ST_STM32MP15x=y
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CONFIG_TARGET_ST_STM32MP15X=y
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CONFIG_ENV_OFFSET_REDUND=0x940000
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CONFIG_CMD_STM32PROG=y
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# CONFIG_ARMV7_NONSEC is not set
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CONFIG_DDR_CACHEABLE_SIZE=0x10000000
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CONFIG_CMD_STM32KEY=y
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CONFIG_TYPEC_STUSB160X=y
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CONFIG_STM32MP15x_STM32IMAGE=y
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CONFIG_TARGET_ST_STM32MP15x=y
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CONFIG_STM32MP15X_STM32IMAGE=y
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CONFIG_TARGET_ST_STM32MP15X=y
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CONFIG_ENV_OFFSET_REDUND=0x2C0000
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CONFIG_CMD_STM32PROG=y
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# CONFIG_ARMV7_NONSEC is not set
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@ -23,7 +23,7 @@ config CLK_STM32_CORE
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config CLK_STM32MP1
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bool "Enable RCC clock driver for STM32MP15"
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depends on ARCH_STM32MP && CLK
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default y if STM32MP15x
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default y if STM32MP15X
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help
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Enable the STM32 clock (RCC) driver. Enable support for
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manipulating STM32MP15's on-SoC clocks.
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