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spi: ich: Some clean up
This cleans up the ich spi driver a little bit: - Remove struct ich_spi_slave that is not referenced anywhere - Remove ending period in some comments - Move struct ich_spi_platdata and struct ich_spi_priv to ich.h - Add #ifndef _ICH_H_ .. in ich.h Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
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Bin Meng
parent
f7c3638c9f
commit
9eb4339ba4
@ -5,6 +5,7 @@
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*
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* This file is derived from the flashrom project.
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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@ -17,41 +18,12 @@
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#include "ich.h"
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#define SPI_OPCODE_WREN 0x06
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#define SPI_OPCODE_FAST_READ 0x0b
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#ifdef DEBUG_TRACE
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#define debug_trace(fmt, args...) debug(fmt, ##args)
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#else
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#define debug_trace(x, args...)
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#endif
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struct ich_spi_platdata {
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enum pch_version ich_version; /* Controller version, 7 or 9 */
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};
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struct ich_spi_priv {
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int ichspi_lock;
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int locked;
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int opmenu;
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int menubytes;
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void *base; /* Base of register set */
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int preop;
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int optype;
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int addr;
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int data;
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unsigned databytes;
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int status;
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int control;
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int bbar;
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int bcr;
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uint32_t *pr; /* only for ich9 */
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int speed; /* pointer to speed control */
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ulong max_speed; /* Maximum bus speed in MHz */
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ulong cur_speed; /* Current bus speed */
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struct spi_trans trans; /* current transaction in progress */
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};
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static u8 ich_readb(struct ich_spi_priv *priv, int reg)
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{
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u8 value = readb(priv->base + reg);
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@ -217,7 +189,7 @@ static void spi_setup_type(struct spi_trans *trans, int data_bytes)
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{
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trans->type = 0xFF;
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/* Try to guess spi type from read/write sizes. */
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/* Try to guess spi type from read/write sizes */
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if (trans->bytesin == 0) {
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if (trans->bytesout + data_bytes > 4)
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/*
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@ -301,7 +273,7 @@ static int spi_setup_opcode(struct ich_spi_priv *ctlr, struct spi_trans *trans)
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static int spi_setup_offset(struct spi_trans *trans)
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{
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/* Separate the SPI address and data. */
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/* Separate the SPI address and data */
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switch (trans->type) {
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case SPI_OPCODE_TYPE_READ_NO_ADDRESS:
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case SPI_OPCODE_TYPE_WRITE_NO_ADDRESS:
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@ -410,7 +382,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
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trans->in = din;
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trans->bytesin = din ? bytes : 0;
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/* There has to always at least be an opcode. */
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/* There has to always at least be an opcode */
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if (!trans->bytesout) {
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debug("ICH SPI: No opcode for transfer\n");
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return -EPROTO;
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@ -541,7 +513,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
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/* write it */
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ich_writew(ctlr, control, ctlr->control);
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/* Wait for Cycle Done Status or Flash Cycle Error. */
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/* Wait for Cycle Done Status or Flash Cycle Error */
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status = ich_status_poll(ctlr, SPIS_CDS | SPIS_FCERR, 1);
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if (status < 0)
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return status;
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@ -6,6 +6,9 @@
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* This file is derived from the flashrom project.
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*/
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#ifndef _ICH_H_
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#define _ICH_H_
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struct ich7_spi_regs {
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uint16_t spis;
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uint16_t spic;
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@ -19,34 +22,34 @@ struct ich7_spi_regs {
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} __packed;
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struct ich9_spi_regs {
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uint32_t bfpr; /* 0x00 */
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uint32_t bfpr; /* 0x00 */
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uint16_t hsfs;
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uint16_t hsfc;
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uint32_t faddr;
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uint32_t _reserved0;
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uint32_t fdata[16]; /* 0x10 */
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uint32_t frap; /* 0x50 */
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uint32_t fdata[16]; /* 0x10 */
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uint32_t frap; /* 0x50 */
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uint32_t freg[5];
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uint32_t _reserved1[3];
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uint32_t pr[5]; /* 0x74 */
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uint32_t pr[5]; /* 0x74 */
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uint32_t _reserved2[2];
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uint8_t ssfs; /* 0x90 */
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uint8_t ssfs; /* 0x90 */
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uint8_t ssfc[3];
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uint16_t preop; /* 0x94 */
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uint16_t preop; /* 0x94 */
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uint16_t optype;
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uint8_t opmenu[8]; /* 0x98 */
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uint8_t opmenu[8]; /* 0x98 */
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uint32_t bbar;
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uint8_t _reserved3[12];
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uint32_t fdoc; /* 0xb0 */
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uint32_t fdoc; /* 0xb0 */
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uint32_t fdod;
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uint8_t _reserved4[8];
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uint32_t afc; /* 0xc0 */
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uint32_t afc; /* 0xc0 */
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uint32_t lvscc;
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uint32_t uvscc;
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uint8_t _reserved5[4];
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uint32_t fpb; /* 0xd0 */
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uint32_t fpb; /* 0xd0 */
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uint8_t _reserved6[28];
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uint32_t srdl; /* 0xf0 */
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uint32_t srdl; /* 0xf0 */
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uint32_t srdc;
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uint32_t scs;
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uint32_t bcr;
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@ -121,8 +124,33 @@ struct spi_trans {
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uint32_t offset;
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};
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struct ich_spi_slave {
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struct spi_slave slave;
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struct spi_trans trans; /* current transaction in progress */
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int speed; /* SPI speed in Hz */
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#define SPI_OPCODE_WREN 0x06
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#define SPI_OPCODE_FAST_READ 0x0b
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struct ich_spi_platdata {
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enum pch_version ich_version; /* Controller version, 7 or 9 */
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};
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struct ich_spi_priv {
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int ichspi_lock;
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int locked;
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int opmenu;
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int menubytes;
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void *base; /* Base of register set */
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int preop;
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int optype;
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int addr;
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int data;
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unsigned databytes;
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int status;
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int control;
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int bbar;
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int bcr;
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uint32_t *pr; /* only for ich9 */
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int speed; /* pointer to speed control */
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ulong max_speed; /* Maximum bus speed in MHz */
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ulong cur_speed; /* Current bus speed */
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struct spi_trans trans; /* current transaction in progress */
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};
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#endif /* _ICH_H_ */
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