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reset: zynqmp: Add reset driver support for versal
Add support for versal platform by adding "xlnx,versal-reset" compatible string in zynqmp-reset driver. Reset numbering schema for versal is not same as zynqmp, so nr_reset and reset_id are set to zero. In case of assert/dessert, required device reset id is sent from respective driver through struct reset_ctl. Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/20220720095959.29610-2-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com>
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@ -199,11 +199,11 @@ config RESET_SCMI
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protocol communication with a SCMI server.
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config RESET_ZYNQMP
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bool "Reset Driver for Xilinx ZynqMP SoC's"
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bool "Reset Driver for Xilinx ZynqMP & Versal SoC's"
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depends on DM_RESET && ZYNQMP_FIRMWARE
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help
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Support for reset controller on Xilinx ZynqMP SoC. Driver is only
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passing request via Xilinx firmware interface to TF-A and PMU
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Support for reset controller on Xilinx ZynqMP & Versal SoC's. Driver
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is only passing request via Xilinx firmware interface to TF-A and PMU
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firmware.
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config RESET_DRA7
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@ -53,7 +53,7 @@ static int zynqmp_reset_request(struct reset_ctl *rst)
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dev_dbg(rst->dev, "%s(rst=%p) (id=%lu) (nr_reset=%d)\n", __func__,
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rst, rst->id, priv->nr_reset);
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if (rst->id > priv->nr_reset)
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if (priv->nr_reset && rst->id > priv->nr_reset)
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return -EINVAL;
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return 0;
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@ -63,8 +63,11 @@ static int zynqmp_reset_probe(struct udevice *dev)
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{
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struct zynqmp_reset_priv *priv = dev_get_priv(dev);
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priv->reset_id = ZYNQMP_RESET_ID;
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priv->nr_reset = ZYNQMP_NR_RESETS;
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if (device_is_compatible(dev, "xlnx,zynqmp-reset")) {
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priv->reset_id = ZYNQMP_RESET_ID;
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priv->nr_reset = ZYNQMP_NR_RESETS;
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}
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return 0;
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}
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@ -76,6 +79,7 @@ const struct reset_ops zynqmp_reset_ops = {
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static const struct udevice_id zynqmp_reset_ids[] = {
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{ .compatible = "xlnx,zynqmp-reset" },
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{ .compatible = "xlnx,versal-reset" },
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{ }
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};
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