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imx7: SPI: add suport for SPI flash in mikroBUS slot
Enable the escpi3 nets attached to the mikroBUS slot on the i.MX7 Sabre evalution board. Also enble the SPI flash commands to work with the "flash click" board. This is V2 of this patch with changes recommended by the maintainer CC: Jagan Teki <jteki@openedev.com>
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@ -50,6 +50,9 @@ DECLARE_GLOBAL_DATA_PTR;
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#define NAND_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
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#define SPI_PAD_CTRL \
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(PAD_CTL_HYS | PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_FAST)
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#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM)
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#ifdef CONFIG_SYS_I2C_MXC
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#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
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@ -68,6 +71,23 @@ static struct i2c_pads_info i2c_pad_info1 = {
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};
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#endif
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static iomux_v3_cfg_t const ecspi3_pads[] = {
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MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
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MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
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MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
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MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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int board_spi_cs_gpio(unsigned bus, unsigned cs)
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{
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return (bus == 2 && cs == 0) ? (IMX_GPIO_NR(6, 22)) : -1;
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}
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static void setup_spi(void)
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{
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imx_iomux_v3_setup_multiple_pads(ecspi3_pads, ARRAY_SIZE(ecspi3_pads));
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}
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int dram_init(void)
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{
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gd->ram_size = PHYS_SDRAM_SIZE;
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@ -553,6 +573,10 @@ int board_init(void)
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board_qspi_init();
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#endif
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#ifdef CONFIG_MXC_SPI
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setup_spi();
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#endif
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return 0;
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}
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@ -45,3 +45,6 @@ CONFIG_G_DNL_MANUFACTURER="FSL"
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CONFIG_G_DNL_VENDOR_NUM=0x0525
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CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
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CONFIG_OF_LIBFDT=y
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CONFIG_SPI_FLASH=y
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CONFIG_CMD_SF=y
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CONFIG_SPI_FLASH_EON=y
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@ -201,6 +201,9 @@
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#define CONFIG_ENV_SIZE SZ_8K
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#define CONFIG_ENV_IS_IN_MMC
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/* MXC SPI driver support */
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#define CONFIG_MXC_SPI
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/*
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* If want to use nand, define CONFIG_NAND_MXS and rework board
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* to support nand, since emmc has pin conflicts with nand
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