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dm: timer: Support 64-bit counter
There are timers with a 64-bit counter value but current timer uclass driver assumes a 32-bit one. Modify timer_get_count() to ask timer driver to always return a 64-bit counter value, and provide an inline helper function timer_conv_64() to handle the 32-bit/64-bit conversion automatically. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
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@ -34,7 +34,7 @@ struct altera_timer_platdata {
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struct altera_timer_regs *regs;
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};
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static int altera_timer_get_count(struct udevice *dev, unsigned long *count)
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static int altera_timer_get_count(struct udevice *dev, u64 *count)
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{
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struct altera_timer_platdata *plat = dev->platdata;
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struct altera_timer_regs *const regs = plat->regs;
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@ -46,7 +46,7 @@ static int altera_timer_get_count(struct udevice *dev, unsigned long *count)
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/* Read timer value */
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val = readl(®s->snapl) & 0xffff;
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val |= (readl(®s->snaph) & 0xffff) << 16;
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*count = ~val;
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*count = timer_conv_64(~val);
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return 0;
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}
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@ -18,7 +18,7 @@ void sandbox_timer_add_offset(unsigned long offset)
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sandbox_timer_offset += offset;
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}
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static int sandbox_timer_get_count(struct udevice *dev, unsigned long *count)
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static int sandbox_timer_get_count(struct udevice *dev, u64 *count)
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{
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*count = os_get_nsec() / 1000 + sandbox_timer_offset * 1000;
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@ -13,14 +13,14 @@ DECLARE_GLOBAL_DATA_PTR;
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/*
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* Implement a timer uclass to work with lib/time.c. The timer is usually
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* a 32 bits free-running up counter. The get_rate() method is used to get
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* a 32/64 bits free-running up counter. The get_rate() method is used to get
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* the input clock frequency of the timer. The get_count() method is used
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* to get the current 32 bits count value. If the hardware is counting down,
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* to get the current 64 bits count value. If the hardware is counting down,
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* the value should be inversed inside the method. There may be no real
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* tick, and no timer interrupt.
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*/
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int timer_get_count(struct udevice *dev, unsigned long *count)
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int timer_get_count(struct udevice *dev, u64 *count)
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{
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const struct timer_ops *ops = device_get_ops(dev);
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@ -47,6 +47,15 @@ static int timer_pre_probe(struct udevice *dev)
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return 0;
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}
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u64 timer_conv_64(u32 count)
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{
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/* increment tbh if tbl has rolled over */
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if (count < gd->timebase_l)
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gd->timebase_h++;
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gd->timebase_l = count;
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return ((u64)gd->timebase_h << 32) | gd->timebase_l;
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}
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UCLASS_DRIVER(timer) = {
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.id = UCLASS_TIMER,
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.name = "timer",
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@ -7,6 +7,14 @@
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#ifndef _TIMER_H_
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#define _TIMER_H_
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/*
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* timer_conv_64 - convert 32-bit counter value to 64-bit
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*
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* @count: 32-bit counter value
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* @return: 64-bit counter value
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*/
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u64 timer_conv_64(u32 count);
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/*
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* Get the current timer count
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*
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@ -14,7 +22,7 @@
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* @count: pointer that returns the current timer count
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* @return: 0 if OK, -ve on error
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*/
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int timer_get_count(struct udevice *dev, unsigned long *count);
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int timer_get_count(struct udevice *dev, u64 *count);
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/*
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* Get the timer input clock frequency
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@ -35,10 +43,10 @@ struct timer_ops {
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* Get the current timer count
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*
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* @dev: The timer device
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* @count: pointer that returns the current timer count
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* @count: pointer that returns the current 64-bit timer count
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* @return: 0 if OK, -ve on error
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*/
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int (*get_count)(struct udevice *dev, unsigned long *count);
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int (*get_count)(struct udevice *dev, u64 *count);
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};
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/*
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@ -69,9 +69,9 @@ ulong notrace get_tbclk(void)
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return timer_get_rate(gd->timer);
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}
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unsigned long notrace timer_read_counter(void)
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uint64_t notrace get_ticks(void)
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{
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unsigned long count;
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u64 count;
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int ret;
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ret = dm_timer_init();
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@ -84,7 +84,8 @@ unsigned long notrace timer_read_counter(void)
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return count;
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}
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#endif /* CONFIG_TIMER */
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#else /* !CONFIG_TIMER */
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uint64_t __weak notrace get_ticks(void)
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{
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@ -97,6 +98,8 @@ uint64_t __weak notrace get_ticks(void)
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return ((uint64_t)gd->timebase_h << 32) | gd->timebase_l;
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}
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#endif /* CONFIG_TIMER */
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/* Returns time in milliseconds */
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static uint64_t notrace tick_to_time(uint64_t tick)
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{
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