Coding style cleanup. Update CHANGELOG.

Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk 2007-08-06 02:17:36 +02:00
parent 221838cc7e
commit 9c7e4b0621
16 changed files with 6441 additions and 6403 deletions

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@ -1,3 +1,64 @@
commit 221838cc7eb178370ff62aa05920a582e12ac322
Author: Jason Jin <Jason.jin@freescale.com>
Date: Tue Jul 10 09:03:22 2007 +0800
Remove the bios emulator from MAI board.
The bios emulator in the MAI board can not pass compile
and have a lot of crap in it. remove it and will have a
clean and small bios emulator in the drivers directory
which can be uesed for every board.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
commit 5618332409bb96f4448d1712899369fc80c0b489
Author: Jason Jin <Jason.jin@freescale.com>
Date: Fri Jul 13 12:14:59 2007 +0800
Fix some compile issues for MAI board.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
commit 0f460a1ee148b648ee242c3157650287d4296260
Author: Jason Jin <Jason.jin@freescale.com>
Date: Fri Jul 13 12:14:58 2007 +0800
Configurations for ATI video card BIOS emulator
This patch add definition of the BIOS emulator and the ATI framebuffer
driver for MPC8641HPCN board.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
commit ece92f85053b8df613edcf05b26a416cbc3d629c
Author: Jason Jin <Jason.jin@freescale.com>
Date: Fri Jul 6 08:34:56 2007 +0800
This is a BIOS emulator, porting from SciTech for u-boot, mainly for
ATI video card BIOS. and can be used for x86 code emulation by some
modifications.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
commit 5072188acabde3178fac7f5a597150e6e74fd40c
Author: Jason Jin <Jason.jin@freescale.com>
Date: Fri Jul 6 08:33:33 2007 +0800
This is a framebuffer driver for ATI video card, can work for PCI9200,
X300, X700, X800 ATI video cards.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
commit 5728be389e65fd47f34b33c2596271eb4db751ae
Author: Wolfgang Denk <wd@denx.de>
Date: Mon Aug 6 01:01:49 2007 +0200
Coding style cleanup. Update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit 8092fef4c29b395958bb649647da7e3775731517
Author: Martin Krause <Martin.Krause@tqs.de>
Date: Tue Dec 12 14:26:01 2006 +0100

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@ -209,4 +209,3 @@
#define PCI_CHIP_R423_5D57 0x5D57
#define PCI_CHIP_RS350_7834 0x7834
#define PCI_CHIP_RS350_7835 0x7835

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@ -137,7 +137,7 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo)
}
} else {
tmp = INREG(CONFIG_MEMSIZE);
}
}
/* mem size is bits [28:0], mask off the rest */
rinfo->video_ram = tmp & CONFIG_MEMSIZE_MASK;
@ -209,13 +209,13 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg
#if 0
/* Workaround from XFree */
if (rinfo->is_mobility) {
/* A temporal workaround for the occational blanking on certain laptop
/* A temporal workaround for the occational blanking on certain laptop
* panels. This appears to related to the PLL divider registers
* (fail to lock?). It occurs even when all dividers are the same
* with their old settings. In this case we really don't need to
* fiddle with PLL registers. By doing this we can avoid the blanking
* problem with some panels.
*/
*/
if ((mode->ppll_ref_div == (INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK)) &&
(mode->ppll_div_3 == (INPLL(PPLL_DIV_3) &
(PPLL_POST3_DIV_MASK | PPLL_FB3_DIV_MASK)))) {

View File

@ -5,7 +5,6 @@
* Most of the definitions here are adapted right from XFree86 *
***************************************************************/
/*
* Chip families. Must fit in the low 16 bits of a long word
*/
@ -38,14 +37,12 @@ enum radeon_family {
((rinfo)->family == CHIP_FAMILY_RV280) || \
((rinfo)->family == CHIP_FAMILY_RS300))
#define IS_R300_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_R300) || \
((rinfo)->family == CHIP_FAMILY_RV350) || \
((rinfo)->family == CHIP_FAMILY_R350) || \
((rinfo)->family == CHIP_FAMILY_RV380) || \
((rinfo)->family == CHIP_FAMILY_R420))
struct radeonfb_info {
char name[20];
@ -86,7 +83,6 @@ static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr,
#define OUTREGP(addr,val,mask) _OUTREGP(rinfo, addr, val,mask)
/*
* 2D Engine helper routines
*/
@ -106,7 +102,6 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo)
printf("radeonfb: Flush Timeout !\n");
}
static inline void _radeon_fifo_wait(struct radeonfb_info *rinfo, int entries)
{
int i;
@ -119,7 +114,6 @@ static inline void _radeon_fifo_wait(struct radeonfb_info *rinfo, int entries)
printf("radeonfb: FIFO Timeout !\n");
}
static inline void _radeon_engine_idle(struct radeonfb_info *rinfo)
{
int i;
@ -137,7 +131,6 @@ static inline void _radeon_engine_idle(struct radeonfb_info *rinfo)
printf("radeonfb: Idle Timeout !\n");
}
#define radeon_engine_idle() _radeon_engine_idle(rinfo)
#define radeon_fifo_wait(entries) _radeon_fifo_wait(rinfo,entries)
#define radeon_msleep(ms) _radeon_msleep(rinfo,ms)
@ -255,9 +248,9 @@ static inline u32 __INPLL(struct radeonfb_info *rinfo, u32 addr)
u32 data;
OUTREG8(CLOCK_CNTL_INDEX, addr & 0x0000003f);
//radeon_pll_errata_after_index(rinfo);
/* radeon_pll_errata_after_index(rinfo); */
data = INREG(CLOCK_CNTL_DATA);
//radeon_pll_errata_after_data(rinfo);
/* radeon_pll_errata_after_data(rinfo); */
return data;
}
@ -266,12 +259,11 @@ static inline void __OUTPLL(struct radeonfb_info *rinfo, unsigned int index,
{
OUTREG8(CLOCK_CNTL_INDEX, (index & 0x0000003f) | 0x00000080);
//radeon_pll_errata_after_index(rinfo);
/* radeon_pll_errata_after_index(rinfo); */
OUTREG(CLOCK_CNTL_DATA, val);
//radeon_pll_errata_after_data(rinfo);
/* radeon_pll_errata_after_data(rinfo); */
}
static inline void __OUTPLLP(struct radeonfb_info *rinfo, unsigned int index,
u32 val, u32 mask)
{
@ -283,11 +275,8 @@ static inline void __OUTPLLP(struct radeonfb_info *rinfo, unsigned int index,
__OUTPLL(rinfo, index, tmp);
}
#define INPLL(addr) __INPLL(rinfo, addr)
#define OUTPLL(index, val) __OUTPLL(rinfo, index, val)
#define OUTPLLP(index, val, mask) __OUTPLLP(rinfo, index, val, mask)
#endif

View File

@ -1,6 +1,6 @@
/****************************************************************************
*
* Video BOOT Graphics Card POST Module
* Video BOOT Graphics Card POST Module
*
* ========================================================================
* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
@ -30,20 +30,20 @@
*
* ========================================================================
*
* Language: ANSI C
* Environment: Linux Kernel
* Developer: Kendall Bennett
* Language: ANSI C
* Environment: Linux Kernel
* Developer: Kendall Bennett
*
* Description: Module to implement booting PCI/AGP controllers on the
* bus. We use the x86 real mode emulator to run the BIOS on
* graphics controllers to bring the cards up.
* Description: Module to implement booting PCI/AGP controllers on the
* bus. We use the x86 real mode emulator to run the BIOS on
* graphics controllers to bring the cards up.
*
* Note that at present this module does *not* support
* multiple controllers.
* Note that at present this module does *not* support
* multiple controllers.
*
* The orignal name of this file is warmboot.c.
* Jason ported this file to u-boot to run the ATI video card
* BIOS in u-boot.
* The orignal name of this file is warmboot.c.
* Jason ported this file to u-boot to run the ATI video card
* BIOS in u-boot.
****************************************************************************/
#include <common.h>
@ -53,11 +53,11 @@
#include <malloc.h>
/* Length of the BIOS image */
#define MAX_BIOSLEN (128 * 1024L)
#define MAX_BIOSLEN (128 * 1024L)
/* Define some useful types and macros */
#define true 1
#define false 0
#define true 1
#define false 0
/* Place to save PCI BAR's that we change and later restore */
static u32 saveROMBaseAddress;
@ -68,7 +68,7 @@ static u32 saveBaseAddress20;
/****************************************************************************
PARAMETERS:
pcidev - PCI device info for the video card on the bus to boot
pcidev - PCI device info for the video card on the bus to boot
VGAInfo - BIOS emulator VGA info structure
REMARKS:
@ -102,8 +102,8 @@ static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo * VGAInfo)
/****************************************************************************
PARAMETERS:
pcidev - PCI device info for the video card on the bus
bar - Place to return the base address register offset to use
pcidev - PCI device info for the video card on the bus
bar - Place to return the base address register offset to use
RETURNS:
The address to use to map the secondary BIOS (AGP devices)
@ -166,7 +166,7 @@ static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base)
/****************************************************************************
PARAMETERS:
pcidev - PCI device info for the video card on the bus
pcidev - PCI device info for the video card on the bus
RETURNS:
Pointers to the mapped BIOS image
@ -196,7 +196,7 @@ void *PCI_mapBIOSImage(pci_dev_t pcidev)
/* Some cards have problems that stop us from being able to read the
BIOS image from the ROM BAR. To fix this we have to do some chipset
specific programming for different cards to solve this problem.
*/
*/
if ((BIOSImagePhys = PCI_findBIOSAddr(pcidev, &BIOSImageBAR)) == 0) {
printf("Find bios addr error\n");
@ -223,7 +223,7 @@ void *PCI_mapBIOSImage(pci_dev_t pcidev)
/****************************************************************************
PARAMETERS:
pcidev - PCI device info for the video card on the bus
pcidev - PCI device info for the video card on the bus
REMARKS:
Unmaps the BIOS image for the device and restores framebuffer mappings
@ -239,7 +239,7 @@ void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage)
/****************************************************************************
PARAMETERS:
pcidev - PCI device info for the video card on the bus to boot
pcidev - PCI device info for the video card on the bus to boot
VGAInfo - BIOS emulator VGA info structure
RETURNS:
@ -294,9 +294,9 @@ static int PCI_postController(pci_dev_t pcidev, BE_VGAInfo * VGAInfo)
/****************************************************************************
PARAMETERS:
pcidev - PCI device info for the video card on the bus to boot
pcidev - PCI device info for the video card on the bus to boot
pVGAInfo - Place to return VGA info structure is requested
cleanUp - True to clean up on exit, false to leave emulator active
cleanUp - True to clean up on exit, false to leave emulator active
REMARKS:
Boots the PCI/AGP video card on the bus using the Video ROM BIOS image

View File

@ -251,71 +251,69 @@ hardware does not support mapping the VGA I/O and memory (such as some
PowerPC systems), we emulate the VGA so that the BIOS will still be able to
set NonVGA display modes such as on ATI hardware.
****************************************************************************/
static u8 VGA_inpb(
const int port)
static u8 VGA_inpb (const int port)
{
u8 val = 0xff;
u8 val = 0xff;
switch (port) {
case 0x3C0:
/* 3C0 has funky characteristics because it can act as either
a data register or index register depending on the state
of an internal flip flop in the hardware. Hence we have
to emulate that functionality in here. */
if (_BE_env.flipFlop3C0 == 0) {
/* Access 3C0 as index register*/
val = _BE_env.emu3C0;
}
else {
/* Access 3C0 as data register*/
if (_BE_env.emu3C0 < ATT_C)
val = _BE_env.emu3C1[_BE_env.emu3C0];
}
_BE_env.flipFlop3C0 ^= 1;
break;
case 0x3C1:
if (_BE_env.emu3C0 < ATT_C)
return _BE_env.emu3C1[_BE_env.emu3C0];
break;
case 0x3CC:
return _BE_env.emu3C2;
case 0x3C4:
return _BE_env.emu3C4;
case 0x3C5:
if (_BE_env.emu3C4 < ATT_C)
return _BE_env.emu3C5[_BE_env.emu3C4];
break;
case 0x3C6:
return _BE_env.emu3C6;
case 0x3C7:
return _BE_env.emu3C7;
case 0x3C8:
return _BE_env.emu3C8;
case 0x3C9:
if (_BE_env.emu3C7 < PAL_C)
return _BE_env.emu3C9[_BE_env.emu3C7++];
break;
case 0x3CE:
return _BE_env.emu3CE;
case 0x3CF:
if (_BE_env.emu3CE < GRA_C)
return _BE_env.emu3CF[_BE_env.emu3CE];
break;
case 0x3D4:
if (_BE_env.emu3C2 & 0x1)
return _BE_env.emu3D4;
break;
case 0x3D5:
if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))
return _BE_env.emu3D5[_BE_env.emu3D4];
break;
case 0x3DA:
_BE_env.flipFlop3C0 = 0;
val = _BE_env.emu3DA;
_BE_env.emu3DA ^= 0x9;
break;
}
return val;
switch (port) {
case 0x3C0:
/* 3C0 has funky characteristics because it can act as either
a data register or index register depending on the state
of an internal flip flop in the hardware. Hence we have
to emulate that functionality in here. */
if (_BE_env.flipFlop3C0 == 0) {
/* Access 3C0 as index register */
val = _BE_env.emu3C0;
} else {
/* Access 3C0 as data register */
if (_BE_env.emu3C0 < ATT_C)
val = _BE_env.emu3C1[_BE_env.emu3C0];
}
_BE_env.flipFlop3C0 ^= 1;
break;
case 0x3C1:
if (_BE_env.emu3C0 < ATT_C)
return _BE_env.emu3C1[_BE_env.emu3C0];
break;
case 0x3CC:
return _BE_env.emu3C2;
case 0x3C4:
return _BE_env.emu3C4;
case 0x3C5:
if (_BE_env.emu3C4 < ATT_C)
return _BE_env.emu3C5[_BE_env.emu3C4];
break;
case 0x3C6:
return _BE_env.emu3C6;
case 0x3C7:
return _BE_env.emu3C7;
case 0x3C8:
return _BE_env.emu3C8;
case 0x3C9:
if (_BE_env.emu3C7 < PAL_C)
return _BE_env.emu3C9[_BE_env.emu3C7++];
break;
case 0x3CE:
return _BE_env.emu3CE;
case 0x3CF:
if (_BE_env.emu3CE < GRA_C)
return _BE_env.emu3CF[_BE_env.emu3CE];
break;
case 0x3D4:
if (_BE_env.emu3C2 & 0x1)
return _BE_env.emu3D4;
break;
case 0x3D5:
if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))
return _BE_env.emu3D5[_BE_env.emu3D4];
break;
case 0x3DA:
_BE_env.flipFlop3C0 = 0;
val = _BE_env.emu3DA;
_BE_env.emu3DA ^= 0x9;
break;
}
return val;
}
/****************************************************************************
@ -328,66 +326,65 @@ Performs an emulated write to one of the 8253 timer registers. For now
we only emulate timer 0 which is the only timer that the BIOS code appears
to use.
****************************************************************************/
static void VGA_outpb(
int port,
u8 val)
static void VGA_outpb (int port, u8 val)
{
switch (port) {
case 0x3C0:
/* 3C0 has funky characteristics because it can act as either
a data register or index register depending on the state
of an internal flip flop in the hardware. Hence we have
to emulate that functionality in here.*/
if (_BE_env.flipFlop3C0 == 0) {
/* Access 3C0 as index register*/
_BE_env.emu3C0 = val;
}
else {
/* Access 3C0 as data register*/
if (_BE_env.emu3C0 < ATT_C)
_BE_env.emu3C1[_BE_env.emu3C0] = val;
}
_BE_env.flipFlop3C0 ^= 1;
break;
case 0x3C2:
_BE_env.emu3C2 = val;
break;
case 0x3C4:
_BE_env.emu3C4 = val;
break;
case 0x3C5:
if (_BE_env.emu3C4 < ATT_C)
_BE_env.emu3C5[_BE_env.emu3C4] = val;
break;
case 0x3C6:
_BE_env.emu3C6 = val;
break;
case 0x3C7:
_BE_env.emu3C7 = (int)val * 3;
break;
case 0x3C8:
_BE_env.emu3C8 = (int)val * 3;
break;
case 0x3C9:
if (_BE_env.emu3C8 < PAL_C)
_BE_env.emu3C9[_BE_env.emu3C8++] = val;
break;
case 0x3CE:
_BE_env.emu3CE = val;
break;
case 0x3CF:
if (_BE_env.emu3CE < GRA_C)
_BE_env.emu3CF[_BE_env.emu3CE] = val;
break;
case 0x3D4:
if (_BE_env.emu3C2 & 0x1)
_BE_env.emu3D4 = val;
break;
case 0x3D5:
if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))
_BE_env.emu3D5[_BE_env.emu3D4] = val;
break;
}
switch (port) {
case 0x3C0:
/* 3C0 has funky characteristics because it can act as either
a data register or index register depending on the state
of an internal flip flop in the hardware. Hence we have
to emulate that functionality in here. */
if (_BE_env.flipFlop3C0 == 0) {
/* Access 3C0 as index register */
_BE_env.emu3C0 = val;
} else {
/* Access 3C0 as data register */
if (_BE_env.emu3C0 < ATT_C)
_BE_env.emu3C1[_BE_env.emu3C0] = val;
}
_BE_env.flipFlop3C0 ^= 1;
break;
case 0x3C2:
_BE_env.emu3C2 = val;
break;
case 0x3C4:
_BE_env.emu3C4 = val;
break;
case 0x3C5:
if (_BE_env.emu3C4 < ATT_C)
_BE_env.emu3C5[_BE_env.emu3C4] = val;
break;
case 0x3C6:
_BE_env.emu3C6 = val;
break;
case 0x3C7:
_BE_env.emu3C7 = (int) val *3;
break;
case 0x3C8:
_BE_env.emu3C8 = (int) val *3;
break;
case 0x3C9:
if (_BE_env.emu3C8 < PAL_C)
_BE_env.emu3C9[_BE_env.emu3C8++] = val;
break;
case 0x3CE:
_BE_env.emu3CE = val;
break;
case 0x3CF:
if (_BE_env.emu3CE < GRA_C)
_BE_env.emu3CF[_BE_env.emu3CE] = val;
break;
case 0x3D4:
if (_BE_env.emu3C2 & 0x1)
_BE_env.emu3D4 = val;
break;
case 0x3D5:
if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))
_BE_env.emu3D5[_BE_env.emu3D4] = val;
break;
}
}
/****************************************************************************

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@ -1,12 +1,12 @@
/****************************************************************************
*
* BIOS emulator and interface
* to Realmode X86 Emulator Library
* BIOS emulator and interface
* to Realmode X86 Emulator Library
*
* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
* Jason Jin <Jason.jin@freescale.com>
*
* Copyright (C) 1996-1999 SciTech Software, Inc.
* Copyright (C) 1996-1999 SciTech Software, Inc.
*
* ========================================================================
*
@ -16,7 +16,7 @@
* both that copyright notice and this permission notice appear in
* supporting documentation, and that the name of the authors not be used
* in advertising or publicity pertaining to distribution of the software
* without specific, written prior permission. The authors makes no
* without specific, written prior permission. The authors makes no
* representations about the suitability of this software for any purpose.
* It is provided "as is" without express or implied warranty.
*
@ -30,18 +30,18 @@
*
* ========================================================================
*
* Language: ANSI C
* Environment: Any
* Developer: Kendall Bennett
* Language: ANSI C
* Environment: Any
* Developer: Kendall Bennett
*
* Description: Module implementing the system specific functions. This
* module is always compiled and linked in the OS depedent
* libraries, and never in a binary portable driver.
* Description: Module implementing the system specific functions. This
* module is always compiled and linked in the OS depedent
* libraries, and never in a binary portable driver.
*
* Jason ported this file to u-boot to run the ATI video card BIOS
* in u-boot. Made all the video memory be emulated during the
* BIOS runing process which may affect the VGA function but the
* frambuffer function can work after run the BIOS.
* Jason ported this file to u-boot to run the ATI video card BIOS
* in u-boot. Made all the video memory be emulated during the
* BIOS runing process which may affect the VGA function but the
* frambuffer function can work after run the BIOS.
*
****************************************************************************/
@ -67,14 +67,14 @@ static X86EMU_pioFuncs _BE_pio __attribute__((section(".got2"))) = {
BE_outl,
};
#define OFF(addr) (u16)(((addr) >> 0) & 0xffff)
#define SEG(addr) (u16)(((addr) >> 4) & 0xf000)
#define OFF(addr) (u16)(((addr) >> 0) & 0xffff)
#define SEG(addr) (u16)(((addr) >> 4) & 0xf000)
/****************************************************************************
PARAMETERS:
debugFlags - Flags to enable debugging options (debug builds only)
memSize - Amount of memory to allocate for real mode machine
info - Pointer to default VGA device information
memSize - Amount of memory to allocate for real mode machine
info - Pointer to default VGA device information
REMARKS:
This functions initialises the BElib, and uses the passed in
@ -116,7 +116,7 @@ int X86API BE_init(u32 debugFlags, int memSize, BE_VGAInfo * info, int shared)
/****************************************************************************
PARAMETERS:
info - Pointer to VGA device information to make current
info - Pointer to VGA device information to make current
REMARKS:
This function sets the VGA BIOS functions in the emulator to point to the
@ -150,7 +150,7 @@ void X86API BE_setVGA(BE_VGAInfo * info)
/****************************************************************************
PARAMETERS:
info - Pointer to VGA device information to retrieve current
info - Pointer to VGA device information to retrieve current
REMARKS:
This function returns the VGA BIOS functions currently active in the
@ -172,16 +172,16 @@ void X86API BE_getVGA(BE_VGAInfo * info)
/****************************************************************************
PARAMETERS:
r_seg - Segment for pointer to convert
r_off - Offset for pointer to convert
r_seg - Segment for pointer to convert
r_off - Offset for pointer to convert
REMARKS:
This function maps a real mode pointer in the emulator memory to a protected
mode pointer that can be used to directly access the memory.
NOTE: The memory is *always* in little endian format, son on non-x86
systems you will need to do endian translations to access this
memory.
NOTE: The memory is *always* in little endian format, son on non-x86
systems you will need to do endian translations to access this
memory.
****************************************************************************/
void *X86API BE_mapRealPointer(uint r_seg, uint r_off)
{
@ -197,9 +197,9 @@ void *X86API BE_mapRealPointer(uint r_seg, uint r_off)
/****************************************************************************
PARAMETERS:
len - Return the length of the VESA buffer
rseg - Place to store VESA buffer segment
roff - Place to store VESA buffer offset
len - Return the length of the VESA buffer
rseg - Place to store VESA buffer segment
roff - Place to store VESA buffer offset
REMARKS:
This function returns the address of the VESA transfer buffer in real
@ -207,9 +207,9 @@ _BE_piomode emulator memory. The VESA transfer buffer is always 1024 bytes long,
and located at 15Kb into the start of the real mode memory (16Kb is where
we put the real mode code we execute for issuing interrupts).
NOTE: The memory is *always* in little endian format, son on non-x86
systems you will need to do endian translations to access this
memory.
NOTE: The memory is *always* in little endian format, son on non-x86
systems you will need to do endian translations to access this
memory.
****************************************************************************/
void *X86API BE_getVESABuf(uint * len, uint * rseg, uint * roff)
{
@ -231,10 +231,10 @@ void X86API BE_exit(void)
/****************************************************************************
PARAMETERS:
seg - Segment of code to call
off - Offset of code to call
regs - Real mode registers to load
sregs - Real mode segment registers to load
seg - Segment of code to call
off - Offset of code to call
regs - Real mode registers to load
sregs - Real mode segment registers to load
REMARKS:
This functions calls a real mode far function at the specified address,
@ -284,9 +284,9 @@ void X86API BE_callRealMode(uint seg, uint off, RMREGS * regs, RMSREGS * sregs)
/****************************************************************************
PARAMETERS:
intno - Interrupt number to execute
in - Real mode registers to load
out - Place to store resulting real mode registers
intno - Interrupt number to execute
in - Real mode registers to load
out - Place to store resulting real mode registers
REMARKS:
This functions calls a real mode interrupt function at the specified address,
@ -323,10 +323,10 @@ int X86API BE_int86(int intno, RMREGS * in, RMREGS * out)
/****************************************************************************
PARAMETERS:
intno - Interrupt number to execute
in - Real mode registers to load
out - Place to store resulting real mode registers
sregs - Real mode segment registers to load
intno - Interrupt number to execute
in - Real mode registers to load
out - Place to store resulting real mode registers
sregs - Real mode segment registers to load
REMARKS:
This functions calls a real mode interrupt function at the specified address,

View File

@ -1,12 +1,12 @@
/****************************************************************************
*
* BIOS emulator and interface
* to Realmode X86 Emulator Library
* BIOS emulator and interface
* to Realmode X86 Emulator Library
*
* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
* Jason Jin <Jason.jin@freescale.com>
*
* Copyright (C) 1996-1999 SciTech Software, Inc.
* Copyright (C) 1996-1999 SciTech Software, Inc.
*
* ========================================================================
*
@ -16,7 +16,7 @@
* both that copyright notice and this permission notice appear in
* supporting documentation, and that the name of the authors not be used
* in advertising or publicity pertaining to distribution of the software
* without specific, written prior permission. The authors makes no
* without specific, written prior permission. The authors makes no
* representations about the suitability of this software for any purpose.
* It is provided "as is" without express or implied warranty.
*
@ -30,14 +30,14 @@
*
* ========================================================================
*
* Language: ANSI C
* Environment: Any
* Developer: Kendall Bennett
* Language: ANSI C
* Environment: Any
* Developer: Kendall Bennett
*
* Description: Internal header file for the BIOS emulator library.
* Description: Internal header file for the BIOS emulator library.
*
* Jason ported this file to u-boot, Added some architecture
* related Macro.
* Jason ported this file to u-boot, Added some architecture
* related Macro.
*
****************************************************************************/
@ -49,14 +49,14 @@
/*---------------------- Macros and type definitions ----------------------*/
#ifdef DEBUG
#define DB(x) x
#define DB(x) x
#else
#define DB(x) do{}while(0);
#define DB(x) do{}while(0);
#endif
#define BIOS_SEG 0xfff0
#define BIOS_SEG 0xfff0
extern X86EMU_sysEnv _X86EMU_env;
#define M _X86EMU_env
#define M _X86EMU_env
/* Macros to read and write values to x86 emulator memory. Memory is always
* considered to be little endian, so we use macros to do endian swapping
@ -64,21 +64,21 @@ extern X86EMU_sysEnv _X86EMU_env;
*/
#ifdef __BIG_ENDIAN__
#define readb_le(base) *((u8*)(base))
#define readw_le(base) ((u16)readb_le(base) | ((u16)readb_le((base) + 1) << 8))
#define readl_le(base) ((u32)readb_le((base) + 0) | ((u32)readb_le((base) + 1) << 8) | \
((u32)readb_le((base) + 2) << 16) | ((u32)readb_le((base) + 3) << 24))
#define readb_le(base) *((u8*)(base))
#define readw_le(base) ((u16)readb_le(base) | ((u16)readb_le((base) + 1) << 8))
#define readl_le(base) ((u32)readb_le((base) + 0) | ((u32)readb_le((base) + 1) << 8) | \
((u32)readb_le((base) + 2) << 16) | ((u32)readb_le((base) + 3) << 24))
#define writeb_le(base, v) *((u8*)(base)) = (v)
#define writew_le(base, v) writeb_le(base + 0, (v >> 0) & 0xff), \
writeb_le(base + 1, (v >> 8) & 0xff)
#define writel_le(base, v) writeb_le(base + 0, (v >> 0) & 0xff), \
writeb_le(base + 1, (v >> 8) & 0xff), \
writeb_le(base + 2, (v >> 16) & 0xff), \
writeb_le(base + 3, (v >> 24) & 0xff)
#define writew_le(base, v) writeb_le(base + 0, (v >> 0) & 0xff), \
writeb_le(base + 1, (v >> 8) & 0xff)
#define writel_le(base, v) writeb_le(base + 0, (v >> 0) & 0xff), \
writeb_le(base + 1, (v >> 8) & 0xff), \
writeb_le(base + 2, (v >> 16) & 0xff), \
writeb_le(base + 3, (v >> 24) & 0xff)
#else
#define readb_le(base) *((u8*)(base))
#define readw_le(base) *((u16*)(base))
#define readl_le(base) *((u32*)(base))
#define readb_le(base) *((u8*)(base))
#define readw_le(base) *((u16*)(base))
#define readl_le(base) *((u32*)(base))
#define writeb_le(base, v) *((u8*)(base)) = (v)
#define writew_le(base, v) *((u16*)(base)) = (v)
#define writel_le(base, v) *((u32*)(base)) = (v)
@ -118,8 +118,8 @@ HEADER:
biosemu.h
MEMBERS:
type - Type of port access (1 = byte, 2 = word, 3 = dword)
defVal - Default power on value
type - Type of port access (1 = byte, 2 = word, 3 = dword)
defVal - Default power on value
finalVal - Final value
****************************************************************************/
typedef struct {

View File

@ -1,10 +1,10 @@
/****************************************************************************
*
* Realmode X86 Emulator Library
* Realmode X86 Emulator Library
*
* Copyright (C) 1991-2004 SciTech Software, Inc.
* Copyright (C) David Mosberger-Tang
* Copyright (C) 1999 Egbert Eich
* Copyright (C) 1991-2004 SciTech Software, Inc.
* Copyright (C) David Mosberger-Tang
* Copyright (C) 1999 Egbert Eich
*
* ========================================================================
*
@ -14,7 +14,7 @@
* both that copyright notice and this permission notice appear in
* supporting documentation, and that the name of the authors not be used
* in advertising or publicity pertaining to distribution of the software
* without specific, written prior permission. The authors makes no
* without specific, written prior permission. The authors makes no
* representations about the suitability of this software for any purpose.
* It is provided "as is" without express or implied warranty.
*
@ -28,11 +28,11 @@
*
* ========================================================================
*
* Language: ANSI C
* Environment: Any
* Developer: Kendall Bennett
* Language: ANSI C
* Environment: Any
* Developer: Kendall Bennett
*
* Description: Header file for debug definitions.
* Description: Header file for debug definitions.
*
****************************************************************************/
@ -43,16 +43,16 @@
/* checks to be enabled for "runtime" */
#define CHECK_IP_FETCH_F 0x1
#define CHECK_SP_ACCESS_F 0x2
#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */
#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset */
#define CHECK_IP_FETCH_F 0x1
#define CHECK_SP_ACCESS_F 0x2
#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */
#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset */
#ifdef DEBUG
# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F)
# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F)
# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F)
# define CHECK_DATA_ACCESS() (M.x86.check & CHECK_DATA_ACCESS_F)
# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F)
# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F)
# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F)
# define CHECK_DATA_ACCESS() (M.x86.check & CHECK_DATA_ACCESS_F)
#else
# define CHECK_IP_FETCH()
# define CHECK_SP_ACCESS()
@ -61,50 +61,50 @@
#endif
#ifdef DEBUG
# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
# define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F)
# define DEBUG_DISASSEMBLE() (M.x86.debug & DEBUG_DISASSEMBLE_F)
# define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F)
# define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F)
# define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_CS_IP)
# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
# define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F)
# define DEBUG_DISASSEMBLE() (M.x86.debug & DEBUG_DISASSEMBLE_F)
# define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F)
# define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F)
# define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_CS_IP)
# define DEBUG_FS() (M.x86.debug & DEBUG_FS_F)
# define DEBUG_PROC() (M.x86.debug & DEBUG_PROC_F)
# define DEBUG_SYSINT() (M.x86.debug & DEBUG_SYSINT_F)
# define DEBUG_TRACECALL() (M.x86.debug & DEBUG_TRACECALL_F)
# define DEBUG_TRACECALLREGS() (M.x86.debug & DEBUG_TRACECALL_REGS_F)
# define DEBUG_SYS() (M.x86.debug & DEBUG_SYS_F)
# define DEBUG_MEM_TRACE() (M.x86.debug & DEBUG_MEM_TRACE_F)
# define DEBUG_IO_TRACE() (M.x86.debug & DEBUG_IO_TRACE_F)
# define DEBUG_FS() (M.x86.debug & DEBUG_FS_F)
# define DEBUG_PROC() (M.x86.debug & DEBUG_PROC_F)
# define DEBUG_SYSINT() (M.x86.debug & DEBUG_SYSINT_F)
# define DEBUG_TRACECALL() (M.x86.debug & DEBUG_TRACECALL_F)
# define DEBUG_TRACECALLREGS() (M.x86.debug & DEBUG_TRACECALL_REGS_F)
# define DEBUG_SYS() (M.x86.debug & DEBUG_SYS_F)
# define DEBUG_MEM_TRACE() (M.x86.debug & DEBUG_MEM_TRACE_F)
# define DEBUG_IO_TRACE() (M.x86.debug & DEBUG_IO_TRACE_F)
# define DEBUG_DECODE_NOPRINT() (M.x86.debug & DEBUG_DECODE_NOPRINT_F)
#else
# define DEBUG_INSTRUMENT() 0
# define DEBUG_DECODE() 0
# define DEBUG_TRACE() 0
# define DEBUG_STEP() 0
# define DEBUG_DISASSEMBLE() 0
# define DEBUG_BREAK() 0
# define DEBUG_SVC() 0
# define DEBUG_SAVE_IP_CS() 0
# define DEBUG_FS() 0
# define DEBUG_PROC() 0
# define DEBUG_SYSINT() 0
# define DEBUG_TRACECALL() 0
# define DEBUG_TRACECALLREGS() 0
# define DEBUG_SYS() 0
# define DEBUG_MEM_TRACE() 0
# define DEBUG_IO_TRACE() 0
# define DEBUG_INSTRUMENT() 0
# define DEBUG_DECODE() 0
# define DEBUG_TRACE() 0
# define DEBUG_STEP() 0
# define DEBUG_DISASSEMBLE() 0
# define DEBUG_BREAK() 0
# define DEBUG_SVC() 0
# define DEBUG_SAVE_IP_CS() 0
# define DEBUG_FS() 0
# define DEBUG_PROC() 0
# define DEBUG_SYSINT() 0
# define DEBUG_TRACECALL() 0
# define DEBUG_TRACECALLREGS() 0
# define DEBUG_SYS() 0
# define DEBUG_MEM_TRACE() 0
# define DEBUG_IO_TRACE() 0
# define DEBUG_DECODE_NOPRINT() 0
#endif
#ifdef DEBUG
# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
x86emu_decode_printf(x)
# define DECODE_PRINTF2(x,y) if (DEBUG_DECODE()) \
x86emu_decode_printf2(x,y)
# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
x86emu_decode_printf(x)
# define DECODE_PRINTF2(x,y) if (DEBUG_DECODE()) \
x86emu_decode_printf2(x,y)
/*
* The following allow us to look at the bytes of an instruction. The
@ -112,15 +112,15 @@
* the decoding process. The SAVE_IP_CS is called initially when the
* major opcode of the instruction is accessed.
*/
#define INC_DECODED_INST_LEN(x) \
if (DEBUG_DECODE()) \
x86emu_inc_decoded_inst_len(x)
#define INC_DECODED_INST_LEN(x) \
if (DEBUG_DECODE()) \
x86emu_inc_decoded_inst_len(x)
#define SAVE_IP_CS(x,y) \
#define SAVE_IP_CS(x,y) \
if (DEBUG_DECODE() | DEBUG_TRACECALL() | DEBUG_BREAK() \
| DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \
M.x86.saved_cs = x; \
M.x86.saved_ip = y; \
| DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \
M.x86.saved_cs = x; \
M.x86.saved_ip = y; \
}
#else
# define INC_DECODED_INST_LEN(x)
@ -130,29 +130,29 @@
#endif
#ifdef DEBUG
#define TRACE_REGS() \
if (DEBUG_DISASSEMBLE()) { \
x86emu_just_disassemble(); \
goto EndOfTheInstructionProcedure; \
} \
#define TRACE_REGS() \
if (DEBUG_DISASSEMBLE()) { \
x86emu_just_disassemble(); \
goto EndOfTheInstructionProcedure; \
} \
if (DEBUG_TRACE() || DEBUG_DECODE()) X86EMU_trace_regs()
#else
# define TRACE_REGS()
#endif
#ifdef DEBUG
# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step()
# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step()
#else
# define SINGLE_STEP()
#endif
#define TRACE_AND_STEP() \
TRACE_REGS(); \
TRACE_REGS(); \
SINGLE_STEP()
#ifdef DEBUG
# define START_OF_INSTR()
# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr();
# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr();
# define END_OF_INSTR_NO_TRACE() x86emu_end_instr();
#else
# define START_OF_INSTR()
@ -161,30 +161,30 @@
#endif
#ifdef DEBUG
# define CALL_TRACE(u,v,w,x,s) \
if (DEBUG_TRACECALLREGS()) \
x86emu_dump_regs(); \
if (DEBUG_TRACECALL()) \
printk("%04x:%04x: CALL %s%04x:%04x\n", u , v, s, w, x);
# define RETURN_TRACE(n,u,v) \
if (DEBUG_TRACECALLREGS()) \
x86emu_dump_regs(); \
if (DEBUG_TRACECALL()) \
printk("%04x:%04x: %s\n",u,v,n);
# define CALL_TRACE(u,v,w,x,s) \
if (DEBUG_TRACECALLREGS()) \
x86emu_dump_regs(); \
if (DEBUG_TRACECALL()) \
printk("%04x:%04x: CALL %s%04x:%04x\n", u , v, s, w, x);
# define RETURN_TRACE(n,u,v) \
if (DEBUG_TRACECALLREGS()) \
x86emu_dump_regs(); \
if (DEBUG_TRACECALL()) \
printk("%04x:%04x: %s\n",u,v,n);
#else
# define CALL_TRACE(u,v,w,x,s)
# define RETURN_TRACE(n,u,v)
#endif
#ifdef DEBUG
#define DB(x) x
#define DB(x) x
#else
#define DB(x)
#endif
/*-------------------------- Function Prototypes --------------------------*/
#ifdef __cplusplus
#ifdef __cplusplus
extern "C" { /* Use "C" linkage when in C++ mode */
#endif
@ -203,7 +203,7 @@ extern "C" { /* Use "C" linkage when in C++ mode */
extern void x86emu_check_mem_access(u32 p);
extern void x86emu_check_data_access(uint s, uint o);
#ifdef __cplusplus
} /* End of "C" linkage for C++ */
#ifdef __cplusplus
} /* End of "C" linkage for C++ */
#endif
#endif /* __X86EMU_DEBUG_H */

View File

@ -139,4 +139,3 @@ u32 pop_long (void);
#endif
#endif /* __X86EMU_PRIM_OPS_H */

View File

@ -1,10 +1,10 @@
/****************************************************************************
*
* Realmode X86 Emulator Library
* Realmode X86 Emulator Library
*
* Copyright (C) 1991-2004 SciTech Software, Inc.
* Copyright (C) David Mosberger-Tang
* Copyright (C) 1999 Egbert Eich
* Copyright (C) 1991-2004 SciTech Software, Inc.
* Copyright (C) David Mosberger-Tang
* Copyright (C) 1999 Egbert Eich
*
* ========================================================================
*
@ -14,7 +14,7 @@
* both that copyright notice and this permission notice appear in
* supporting documentation, and that the name of the authors not be used
* in advertising or publicity pertaining to distribution of the software
* without specific, written prior permission. The authors makes no
* without specific, written prior permission. The authors makes no
* representations about the suitability of this software for any purpose.
* It is provided "as is" without express or implied warranty.
*
@ -28,11 +28,11 @@
*
* ========================================================================
*
* Language: ANSI C
* Environment: Any
* Developer: Kendall Bennett
* Language: ANSI C
* Environment: Any
* Developer: Kendall Bennett
*
* Description: Header file for x86 register definitions.
* Description: Header file for x86 register definitions.
*
****************************************************************************/
@ -54,11 +54,11 @@
* EAX & 0xff === AL
* EAX & 0xffff == AX
*
* etc. The result is that alot of the calculations can then be
* etc. The result is that alot of the calculations can then be
* done using the native instruction set fully.
*/
#ifdef __BIG_ENDIAN__
#ifdef __BIG_ENDIAN__
typedef struct {
u32 e_reg;
@ -178,7 +178,7 @@ struct i386_segment_regs {
/* flag conditions */
#define FB_CF 0x0001 /* CARRY flag */
#define FB_PF 0x0004 /* PARITY flag */
#define FB_AF 0x0010 /* AUX flag */
#define FB_AF 0x0010 /* AUX flag */
#define FB_ZF 0x0040 /* ZERO flag */
#define FB_SF 0x0080 /* SIGN flag */
#define FB_TF 0x0100 /* TRAP flag */
@ -199,7 +199,7 @@ struct i386_segment_regs {
#define F_CF 0x0001 /* CARRY flag */
#define F_PF 0x0004 /* PARITY flag */
#define F_AF 0x0010 /* AUX flag */
#define F_AF 0x0010 /* AUX flag */
#define F_ZF 0x0040 /* ZERO flag */
#define F_SF 0x0080 /* SIGN flag */
#define F_TF 0x0100 /* TRAP flag */
@ -207,60 +207,60 @@ struct i386_segment_regs {
#define F_DF 0x0400 /* DIR flag */
#define F_OF 0x0800 /* OVERFLOW flag */
#define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag))
#define SET_FLAG(flag) (M.x86.R_FLG |= (flag))
#define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag))
#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
#define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag))
#define SET_FLAG(flag) (M.x86.R_FLG |= (flag))
#define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag))
#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
#define CONDITIONAL_SET_FLAG(COND,FLAG) \
if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
#define F_ALL_CALC 0xff0000 /* All have been calced */
#define F_ALL_CALC 0xff0000 /* All have been calced */
/*
* Emulator machine state.
* Segment usage control.
*/
#define SYSMODE_SEG_DS_SS 0x00000001
#define SYSMODE_SEGOVR_CS 0x00000002
#define SYSMODE_SEGOVR_DS 0x00000004
#define SYSMODE_SEGOVR_ES 0x00000008
#define SYSMODE_SEGOVR_FS 0x00000010
#define SYSMODE_SEGOVR_GS 0x00000020
#define SYSMODE_SEGOVR_SS 0x00000040
#define SYSMODE_PREFIX_REPE 0x00000080
#define SYSMODE_PREFIX_REPNE 0x00000100
#define SYSMODE_PREFIX_DATA 0x00000200
#define SYSMODE_PREFIX_ADDR 0x00000400
#define SYSMODE_INTR_PENDING 0x10000000
#define SYSMODE_EXTRN_INTR 0x20000000
#define SYSMODE_HALTED 0x40000000
#define SYSMODE_SEG_DS_SS 0x00000001
#define SYSMODE_SEGOVR_CS 0x00000002
#define SYSMODE_SEGOVR_DS 0x00000004
#define SYSMODE_SEGOVR_ES 0x00000008
#define SYSMODE_SEGOVR_FS 0x00000010
#define SYSMODE_SEGOVR_GS 0x00000020
#define SYSMODE_SEGOVR_SS 0x00000040
#define SYSMODE_PREFIX_REPE 0x00000080
#define SYSMODE_PREFIX_REPNE 0x00000100
#define SYSMODE_PREFIX_DATA 0x00000200
#define SYSMODE_PREFIX_ADDR 0x00000400
#define SYSMODE_INTR_PENDING 0x10000000
#define SYSMODE_EXTRN_INTR 0x20000000
#define SYSMODE_HALTED 0x40000000
#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS)
#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS | \
SYSMODE_PREFIX_DATA | \
SYSMODE_PREFIX_ADDR)
#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS)
#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS | \
SYSMODE_PREFIX_DATA | \
SYSMODE_PREFIX_ADDR)
#define INTR_SYNCH 0x1
#define INTR_ASYNCH 0x2
#define INTR_HALTED 0x4
#define INTR_SYNCH 0x1
#define INTR_ASYNCH 0x2
#define INTR_HALTED 0x4
typedef struct {
struct i386_general_regs gen;
@ -268,15 +268,15 @@ typedef struct {
struct i386_segment_regs seg;
/*
* MODE contains information on:
* REPE prefix 2 bits repe,repne
* SEGMENT overrides 5 bits normal,DS,SS,CS,ES
* Delayed flag set 3 bits (zero, signed, parity)
* reserved 6 bits
* interrupt # 8 bits instruction raised interrupt
* BIOS video segregs 4 bits
* Interrupt Pending 1 bits
* Extern interrupt 1 bits
* Halted 1 bits
* REPE prefix 2 bits repe,repne
* SEGMENT overrides 5 bits normal,DS,SS,CS,ES
* Delayed flag set 3 bits (zero, signed, parity)
* reserved 6 bits
* interrupt # 8 bits instruction raised interrupt
* BIOS video segregs 4 bits
* Interrupt Pending 1 bits
* Extern interrupt 1 bits
* Halted 1 bits
*/
long mode;
u8 intno;
@ -288,7 +288,7 @@ typedef struct {
u16 saved_cs;
int enc_pos;
int enc_str_pos;
char decode_buf[32]; /* encoded byte stream */
char decode_buf[32]; /* encoded byte stream */
char decoded_buf[256]; /* disassembled strings */
#endif
} X86EMU_regs;
@ -298,9 +298,9 @@ REMARKS:
Structure maintaining the emulator machine state.
MEMBERS:
x86 - X86 registers
mem_base - Base real mode memory for the emulator
mem_size - Size of the real mode memory block for the emulator
x86 - X86 registers
mem_base - Base real mode memory for the emulator
mem_size - Size of the real mode memory block for the emulator
****************************************************************************/
#undef x86
typedef struct {
@ -314,7 +314,7 @@ typedef struct {
/*----------------------------- Global Variables --------------------------*/
#ifdef __cplusplus
#ifdef __cplusplus
extern "C" { /* Use "C" linkage when in C++ mode */
#endif
@ -324,7 +324,7 @@ extern "C" { /* Use "C" linkage when in C++ mode */
*/
extern X86EMU_sysEnv _X86EMU_env;
#define M _X86EMU_env
#define M _X86EMU_env
/*-------------------------- Function Prototypes --------------------------*/
@ -334,7 +334,7 @@ extern "C" { /* Use "C" linkage when in C++ mode */
void printk(const char *fmt, ...);
#endif
#ifdef __cplusplus
} /* End of "C" linkage for C++ */
#ifdef __cplusplus
} /* End of "C" linkage for C++ */
#endif
#endif /* __X86EMU_REGS_H */

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