mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-24 20:54:24 +08:00
Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
This commit is contained in:
parent
391fd93ab2
commit
9973e3c614
@ -39,7 +39,7 @@ int checkboard (void)
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return 0;
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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int size,i;
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@ -35,7 +35,7 @@
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** ------
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** int board_early_init_f(void)
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** int checkboard(void)
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** long int initdram(int board_type)
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** phys_size_t initdram(int board_type)
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** called from 'board_init_f()' into 'common/board.c'
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**
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** void reset_phy(void)
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@ -179,7 +179,7 @@ int checkboard (void)
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/* ------------------------------------------------------------------------- */
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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volatile memctl8xx_t *memctl = &immap->im_memctl;
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@ -81,7 +81,7 @@ int checkboard (void)
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return 0;
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}
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long initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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return articiaS_ram_init ();
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}
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@ -1728,7 +1728,7 @@ long int dram_size (long int *base, long int maxsize)
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/* ppcboot interface function to SDRAM init - this is where all the
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* controlling logic happens */
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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int s0 = 0, s1 = 0;
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int checkbank[4] = {[0 ... 3] = 0 };
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@ -1737,7 +1737,7 @@ long int dram_size (long int *base, long int maxsize)
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/* ppcboot interface function to SDRAM init - this is where all the
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* controlling logic happens */
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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int s0 = 0, s1 = 0;
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int checkbank[4] = {[0 ... 3] = 0 };
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@ -165,7 +165,7 @@ void rpxclassic_init (void)
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/* ------------------------------------------------------------------------- */
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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volatile memctl8xx_t *memctl = &immap->im_memctl;
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@ -102,7 +102,7 @@ int checkboard (void)
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/* ------------------------------------------------------------------------- */
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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volatile memctl8xx_t *memctl = &immap->im_memctl;
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@ -104,7 +104,7 @@ int checkboard (void)
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/* ------------------------------------------------------------------------- */
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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volatile immap_t *immap = (immap_t *)CFG_IMMR;
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volatile memctl8xx_t *memctl = &immap->im_memctl;
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@ -110,7 +110,7 @@ int checkboard (void)
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/* ------------------------------------------------------------------------- */
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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volatile memctl8xx_t *memctl = &immap->im_memctl;
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@ -38,7 +38,7 @@ int checkboard (void)
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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long size;
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long new_bank0_end;
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@ -65,7 +65,7 @@ static uint sdram_table[] = {
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0xfffffc27, 0xfffffc04, 0xfffffc04, 0xfffffc04
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};
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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long int msize;
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volatile immap_t *immap = (volatile immap_t *)CFG_IMMR;
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@ -112,7 +112,7 @@ int board_early_init_f (void)
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return 0;
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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u32 msize = 0;
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@ -131,7 +131,7 @@ void setupBat (ulong size)
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mtspr (DBAT7U, batu);
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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ulong size;
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@ -50,7 +50,7 @@ int checkboard (void)
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return 0;
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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return (0);
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}
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@ -54,7 +54,7 @@ int checkboard (void)
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return 0;
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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return (0);
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}
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@ -34,7 +34,7 @@ int checkboard (void)
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return 0;
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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return (0);
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}
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@ -34,7 +34,7 @@ int checkboard (void)
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return 0;
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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return (0);
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}
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@ -29,7 +29,7 @@ int checkboard (void)
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return 0;
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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return (0);
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}
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@ -59,7 +59,7 @@ static void cram_bcr_write(u32 wr_val)
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}
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#endif
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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#if defined(CONFIG_NAND_SPL)
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u32 reg;
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@ -453,7 +453,7 @@ int checkboard(void)
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL))
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long dram_size;
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@ -70,7 +70,7 @@ int checkboard(void)
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initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
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the necessary info for SDRAM controller configuration
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------------------------------------------------------------------------- */
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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long int ret;
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@ -205,7 +205,7 @@ u32 ddr_clktr(u32 default_val) {
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* I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot
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* code.
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*/
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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return CFG_MBYTES_SDRAM << 20;
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}
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return (0);
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}
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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long dram_size = 0;
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@ -201,7 +201,7 @@ int checkboard (void)
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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long dram_size = 0;
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@ -52,7 +52,7 @@ extern void denali_core_search_data_eye(void);
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* initdram -- 440EPx's DDR controller is a DENALI Core
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*
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************************************************************************/
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
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#if !defined(CONFIG_NAND_SPL)
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@ -78,10 +78,10 @@ int checkboard(void)
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}
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/*************************************************************************
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* long int initdram
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* phys_size_t initdram
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*
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************************************************************************/
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long int initdram(int board)
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phys_size_t initdram(int board)
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{
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return CFG_SDRAM_SIZE_PER_BANK * CFG_SDRAM_BANKS; /* 128Mbytes */
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}
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* initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
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* the necessary info for SDRAM controller configuration
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*/
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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return spd_sdram();
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}
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@ -281,7 +281,7 @@ void sdram_tr1_set(int ram_address, int* tr1_value)
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*tr1_value = (first_good + last_bad) / 2;
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}
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long int initdram(int board)
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phys_size_t initdram(int board)
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{
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register uint reg;
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int tr1_bank1, tr1_bank2;
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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char *s = getenv ("dramsize");
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@ -340,7 +340,7 @@ int misc_init_r(void)
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return (0);
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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volatile memctl8260_t *memctl = &immap->im_memctl;
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@ -64,7 +64,7 @@ int board_early_init_f(void)
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return 0;
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}
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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unsigned long expected_size;
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unsigned long actual_size;
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@ -90,7 +90,7 @@ int board_early_init_f(void)
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return 0;
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}
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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unsigned long expected_size;
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unsigned long actual_size;
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@ -98,7 +98,7 @@ long int fixed_sdram (void)
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}
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#endif /* !defined(CONFIG_SPD_EEPROM) */
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long int
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phys_size_t
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initdram(int board_type)
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{
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long dram_size = 0;
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@ -83,7 +83,7 @@ int checkboard (void)
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return 0;
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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long size;
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long new_bank0_end;
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@ -59,7 +59,7 @@ typedef struct SBootInfo {
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/* barcohydra.c */
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int checkboard(void);
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long int initdram(int board_type);
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phys_size_t initdram(int board_type);
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void pci_init_board(void);
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void check_flash(void);
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int write_flash(char *addr, char value);
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@ -104,7 +104,7 @@ static void sdram_start (int hi_addr)
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*/
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#if defined(CONFIG_MPC5200)
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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ulong dramsize = 0;
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ulong dramsize2 = 0;
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@ -205,7 +205,7 @@ long int initdram (int board_type)
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#elif defined(CONFIG_MGT5100)
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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ulong dramsize = 0;
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#ifndef CFG_RAMBOOT
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@ -39,7 +39,7 @@ int checkboard(void)
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return 0;
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}
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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#ifdef DEBUG
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int brate;
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@ -48,7 +48,7 @@ int checkboard(void)
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return 0;
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}
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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#ifdef DEBUG
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printf("SDRAM attributes:\n");
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@ -97,7 +97,7 @@ void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)
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}
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#endif /* CONFIG_BFIN_IDE */
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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#ifdef DEBUG
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int brate;
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@ -39,7 +39,7 @@ int checkboard(void)
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return 0;
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}
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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#ifdef DEBUG
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int brate;
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@ -51,7 +51,7 @@ int checkboard(void)
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return 0;
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}
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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return 64*1024*1024;
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}
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@ -108,7 +108,7 @@ int checkboard (void)
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/* ------------------------------------------------------------------------- */
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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volatile memctl8xx_t *memctl = &immap->im_memctl;
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@ -82,7 +82,7 @@ static void sdram_start (int hi_addr)
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*/
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#if defined(CONFIG_MPC5200)
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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ulong dramsize = 0;
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ulong dramsize2 = 0;
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@ -185,7 +185,7 @@ long int initdram (int board_type)
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#elif defined(CONFIG_MGT5100)
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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ulong dramsize = 0;
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#ifndef CFG_RAMBOOT
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@ -114,7 +114,7 @@ static mem_conf_t* get_mem_config(int board_type)
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/*
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* Initalize SDRAM - configure SDRAM controller, detect memory size.
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*/
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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ulong dramsize = 0;
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#ifndef CFG_RAMBOOT
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@ -62,7 +62,7 @@ int checkboard(void)
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/*
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* Get RAM size.
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*/
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long int initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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return (SRAM_SIZE); /* We currently have a static size adapted for cmi board. */
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}
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@ -32,7 +32,7 @@ int checkboard (void)
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return 0;
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};
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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volatile sdramctrl_t *sdp = (sdramctrl_t *) (MMAP_SDRAM);
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@ -233,7 +233,7 @@ int misc_init_f (void)
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/* ------------------------------------------------------------------------- */
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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#ifdef CONFIG_CMA111
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return (32L * 1024L * 1024L);
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@ -61,7 +61,7 @@ int checkboard(void)
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return 0;
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}
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long int initdram (int board_type)
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phys_size_t initdram (int board_type)
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{
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int m, row, col, bank, i, ref;
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unsigned long start, end;
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@ -273,7 +273,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
|
||||
return (size);
|
||||
}
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
||||
volatile memctl8260_t *memctl = &immap->im_memctl;
|
||||
|
@ -274,7 +274,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
|
||||
return (size);
|
||||
}
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
||||
volatile memctl8260_t *memctl = &immap->im_memctl;
|
||||
|
@ -170,7 +170,7 @@ int misc_init_r (void)
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
return (L1_MEMSIZE);
|
||||
}
|
||||
|
@ -120,7 +120,7 @@ int checkboard(void)
|
||||
* configured by initialization code
|
||||
*
|
||||
*/
|
||||
long initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
ulong tot_size;
|
||||
ulong bank_size;
|
||||
|
@ -88,7 +88,7 @@ int checkboard(void)
|
||||
* configured by initialization code
|
||||
*
|
||||
*/
|
||||
long initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
ulong tot_size;
|
||||
ulong bank_size;
|
||||
|
@ -45,7 +45,7 @@ int checkboard (void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
long int initdram(int board_type)
|
||||
phys_size_t initdram(int board_type)
|
||||
{
|
||||
long size;
|
||||
long new_bank0_end;
|
||||
|
@ -203,7 +203,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -27,7 +27,7 @@
|
||||
#include <asm/mipsregs.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
long int initdram(int board_type)
|
||||
phys_size_t initdram(int board_type)
|
||||
{
|
||||
/* Sdram is setup by assembler code */
|
||||
/* If memory could be changed, we should return the true value here */
|
||||
|
@ -52,7 +52,7 @@ int checkflash (void)
|
||||
return (0);
|
||||
}
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
int i, cnt;
|
||||
volatile uchar *base = CFG_SDRAM_BASE;
|
||||
|
@ -162,7 +162,7 @@ long int dram_size (int board_type)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
return dram_size (board_type);
|
||||
}
|
||||
|
@ -104,7 +104,7 @@ long int dram_size (int board_type)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
return dram_size (board_type);
|
||||
}
|
||||
|
@ -251,7 +251,7 @@ int misc_init_r (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
||||
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
||||
|
@ -32,7 +32,7 @@
|
||||
* initialize SDRAM/DDRAM controller.
|
||||
* TBD: get data from I2C EEPROM
|
||||
*****************************************************************************/
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
ulong dramsize = 0;
|
||||
#ifndef CFG_RAMBOOT
|
||||
|
@ -76,7 +76,7 @@ int checkboard (void)
|
||||
/*****************************************************************************
|
||||
* Initialize DRAM controller
|
||||
*****************************************************************************/
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
||||
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
||||
|
@ -208,7 +208,7 @@ int board_early_init_f (void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
long int initdram(int board_type)
|
||||
phys_size_t initdram(int board_type)
|
||||
{
|
||||
vu_char *bcsr = (vu_char *)CFG_BCSR;
|
||||
long int msize = 16L << (bcsr[2] & 3);
|
||||
|
@ -243,7 +243,7 @@ int checkboard (void)
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
||||
volatile memctl8260_t *memctl = &immap->im_memctl;
|
||||
|
@ -219,7 +219,7 @@ int board_early_init_f (void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
long int initdram(int board_type)
|
||||
phys_size_t initdram(int board_type)
|
||||
{
|
||||
/* Size in MB of SDRAM populated on board*/
|
||||
long int msize = 256;
|
||||
|
@ -86,7 +86,7 @@ int board_early_init_f (void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
long int msize;
|
||||
volatile immap_t *immap = (volatile immap_t *)CFG_IMMR;
|
||||
|
@ -121,7 +121,7 @@ int checkboard (void)
|
||||
*/
|
||||
/* ------------------------------------------------------------------------- */
|
||||
/* ------------------------------------------------------------------------- */
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
#ifndef CONFIG_ERIC
|
||||
int i;
|
||||
|
@ -79,7 +79,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
return (16 * 1024 * 1024);
|
||||
}
|
||||
|
@ -423,7 +423,7 @@ int checkboard (void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -207,7 +207,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -141,7 +141,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -117,7 +117,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -495,7 +495,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -84,7 +84,7 @@ static void sdram_start(int hi_addr)
|
||||
* is something else than 0x00000000.
|
||||
*/
|
||||
|
||||
long int initdram(int board_type)
|
||||
phys_size_t initdram(int board_type)
|
||||
{
|
||||
ulong dramsize = 0;
|
||||
ulong test1, test2;
|
||||
|
@ -1602,7 +1602,7 @@ dram_size(long int *base, long int maxsize)
|
||||
|
||||
/* ppcboot interface function to SDRAM init - this is where all the
|
||||
* controlling logic happens */
|
||||
long int
|
||||
phys_size_t
|
||||
initdram(int board_type)
|
||||
{
|
||||
int s0 = 0, s1 = 0;
|
||||
|
@ -186,7 +186,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
return (16 * 1024 * 1024);
|
||||
}
|
||||
|
@ -206,7 +206,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
return (16 * 1024 * 1024);
|
||||
}
|
||||
|
@ -122,7 +122,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -200,7 +200,7 @@ int checkboard (void)
|
||||
}
|
||||
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
return (16 * 1024 * 1024);
|
||||
}
|
||||
|
@ -644,7 +644,7 @@ int checkboard (void)
|
||||
}
|
||||
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -229,7 +229,7 @@ int checkboard (void)
|
||||
}
|
||||
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -84,7 +84,7 @@ static void sdram_start(int hi_addr)
|
||||
* is something else than 0x00000000.
|
||||
*/
|
||||
|
||||
long int initdram(int board_type)
|
||||
phys_size_t initdram(int board_type)
|
||||
{
|
||||
ulong dramsize = 0;
|
||||
ulong test1, test2;
|
||||
|
@ -101,7 +101,7 @@ int checkboard (void)
|
||||
}
|
||||
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -358,7 +358,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -84,7 +84,7 @@ static void sdram_start(int hi_addr)
|
||||
* is something else than 0x00000000.
|
||||
*/
|
||||
|
||||
long int initdram(int board_type)
|
||||
phys_size_t initdram(int board_type)
|
||||
{
|
||||
ulong dramsize = 0;
|
||||
ulong test1, test2;
|
||||
|
@ -232,7 +232,7 @@ int checkboard (void)
|
||||
}
|
||||
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -157,7 +157,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -50,7 +50,7 @@ extern void denali_core_search_data_eye(void);
|
||||
* initdram -- 440EPx's DDR controller is a DENALI Core
|
||||
*
|
||||
************************************************************************/
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
|
||||
#if !defined(CONFIG_NAND_SPL)
|
||||
|
@ -77,7 +77,7 @@ int checkboard (void) {
|
||||
};
|
||||
|
||||
|
||||
long int initdram (int board_type) {
|
||||
phys_size_t initdram (int board_type) {
|
||||
unsigned long junk = 0xa5a59696;
|
||||
|
||||
/*
|
||||
|
@ -305,7 +305,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -129,7 +129,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -205,7 +205,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
|
@ -101,7 +101,7 @@ int checkboard (void)
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
||||
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
||||
|
@ -53,7 +53,7 @@ int checkflash (void)
|
||||
}
|
||||
#endif
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
int m, row, col, bank, i;
|
||||
unsigned long start, end;
|
||||
|
@ -93,7 +93,7 @@ unsigned long setdram(int m, int row, int col, int bank)
|
||||
return (1 << (col + row + 3) ) * bank * m;
|
||||
}
|
||||
|
||||
long int initdram(int board_type)
|
||||
phys_size_t initdram(int board_type)
|
||||
{
|
||||
unsigned int msr;
|
||||
long int size = 0;
|
||||
|
@ -125,7 +125,7 @@ int checkboard (void)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
||||
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
||||
|
@ -524,7 +524,7 @@ static long int dram_size (long int *base, long int maxsize)
|
||||
|
||||
/* U-Boot interface function to SDRAM init - this is where all the
|
||||
* controlling logic happens */
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
ulong checkbank[4] = {[0 ... 3] = 0 };
|
||||
int bank_no;
|
||||
|
@ -71,7 +71,7 @@ int checkboard (void)
|
||||
}
|
||||
|
||||
/* ************************************************************************ */
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
/* ------------------------------------------------------------------------ --
|
||||
* Purpose : Determines size of mounted DRAM.
|
||||
* Remarks : Size is determined by reading SDRAM configuration registers as
|
||||
|
@ -600,7 +600,7 @@ static int initsdram(uint base, uint *noMbytes)
|
||||
|
||||
/* ========================================================================= */
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
uint sdramsz = 0; /* size of sdram in Mbytes */
|
||||
uint base = 0; /* base of dram in bytes */
|
||||
|
@ -96,7 +96,7 @@ int checkboard (void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
long int initdram (int board_type)
|
||||
phys_size_t initdram (int board_type)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *)CFG_IMMR;
|
||||
volatile memctl8xx_t *memctl = &immap->im_memctl;
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user