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imx8mn: Add low drive mode support for DDR4/LPDDR4 EVK

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Add dedicated defconfigs for iMX8MN low drive mode which set the VDD_SOC
and VDD_DRAM to 0.8v, DDR at 1600MTS (800Mhz clock) and GPU at 200Mhz.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Ye Li 2021-03-19 15:57:09 +08:00 committed by Stefano Babic
parent 4e805c197b
commit 98bcdf1635
6 changed files with 2558 additions and 1 deletions
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45
arch/arm/mach-imx/imx8m/soc.c
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@ -726,6 +726,41 @@ int disable_vpu_nodes(void *blob)
return -EPERM;
}
#ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
static int low_drive_gpu_freq(void *blob)
{
static const char *nodes_path_8mn[] = {
"/gpu@38000000",
"/soc@0/gpu@38000000"
};
int nodeoff, cnt, i;
u32 assignedclks[7];
nodeoff = fdt_path_offset(blob, nodes_path_8mn[0]);
if (nodeoff < 0)
return nodeoff;
cnt = fdtdec_get_int_array_count(blob, nodeoff, "assigned-clock-rates", assignedclks, 7);
if (cnt < 0)
return cnt;
if (cnt != 7)
printf("Warning: %s, assigned-clock-rates count %d\n", nodes_path_8mn[0], cnt);
assignedclks[cnt - 1] = 200000000;
assignedclks[cnt - 2] = 200000000;
for (i = 0; i < cnt; i++) {
debug("<%u>, ", assignedclks[i]);
assignedclks[i] = cpu_to_fdt32(assignedclks[i]);
}
debug("\n");
return fdt_setprop(blob, nodeoff, "assigned-clock-rates", &assignedclks, sizeof(assignedclks));
}
#endif
int disable_gpu_nodes(void *blob)
{
static const char * const nodes_path_8mn[] = {
@ -895,6 +930,16 @@ usb_modify_speed:
#elif defined(CONFIG_IMX8MN)
if (is_imx8mnl() || is_imx8mndl() || is_imx8mnsl())
disable_gpu_nodes(blob);
#ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
else {
int ldm_gpu = low_drive_gpu_freq(blob);
if (ldm_gpu < 0)
printf("Update GPU node assigned-clock-rates failed\n");
else
printf("Update GPU node assigned-clock-rates ok\n");
}
#endif
if (is_imx8mnd() || is_imx8mndl())
disable_cpu_nodes(blob, 2);

4
board/freescale/imx8mn_evk/Kconfig
View File

@ -9,6 +9,10 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "imx8mn_evk"
config IMX8MN_LOW_DRIVE_MODE
bool "Enable the low drive mode of iMX8MN on EVK board"
default n
source "board/freescale/common/Kconfig"
endif

5
board/freescale/imx8mn_evk/Makefile
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@ -8,6 +8,11 @@ obj-y += imx8mn_evk.o
ifdef CONFIG_SPL_BUILD
obj-y += spl.o
ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing_ld.o
obj-$(CONFIG_IMX8M_DDR4) += ddr4_timing_ld.o
else
obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
obj-$(CONFIG_IMX8M_DDR4) += ddr4_timing.o
endif
endif

1057
board/freescale/imx8mn_evk/ddr4_timing_ld.c Normal file
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File diff suppressed because it is too large Load Diff

1441
board/freescale/imx8mn_evk/lpddr4_timing_ld.c Normal file
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File diff suppressed because it is too large Load Diff

7
board/freescale/imx8mn_evk/spl.c
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@ -75,10 +75,15 @@ int power_init_board(void)
/* BUCKxOUT_DVS0/1 control BUCK123 output */
pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
#ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
/* Set VDD_SOC/VDD_DRAM to 0.8v for low drive mode */
pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x10);
#else
/* increase VDD_SOC/VDD_DRAM to typical value 0.95V before first DRAM access */
pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
#endif
/* Set DVS1 to 0.85v for suspend */
/* Enable DVS control through PMIC_STBY_REQ and set B1_ENMODE=1 (ON by PMIC_ON_REQ=H) */
pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);