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armv7:ls1021a: Enable workaround for DDR erratum A-009942

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Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Shengzhou Liu 2016-09-01 14:50:36 +08:00 committed by York Sun
parent 214ffae02d
commit 93a6d3284c
2 changed files with 7 additions and 1 deletions
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1
arch/arm/include/asm/arch-ls102xa/config.h
View File

@ -131,6 +131,7 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_FSL_ERRATUM_A008378 #define CONFIG_SYS_FSL_ERRATUM_A008378
#define CONFIG_SYS_FSL_ERRATUM_A009663 #define CONFIG_SYS_FSL_ERRATUM_A009663
#define CONFIG_SYS_FSL_ERRATUM_A009942
#define CONFIG_SYS_FSL_ERRATUM_A010315 #define CONFIG_SYS_FSL_ERRATUM_A010315
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#else #else

7
board/freescale/ls1021atwr/ls1021atwr.c
View File

@ -142,7 +142,7 @@ int checkboard(void)
void ddrmc_init(void) void ddrmc_init(void)
{ {
struct ccsr_ddr *ddr = (struct ccsr_ddr *)CONFIG_SYS_FSL_DDR_ADDR; struct ccsr_ddr *ddr = (struct ccsr_ddr *)CONFIG_SYS_FSL_DDR_ADDR;
u32 temp_sdram_cfg; u32 temp_sdram_cfg, tmp;
out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG); out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG);
@ -189,6 +189,11 @@ void ddrmc_init(void)
out_be32(&ddr->ddr_zq_cntl, DDR_DDR_ZQ_CNTL); out_be32(&ddr->ddr_zq_cntl, DDR_DDR_ZQ_CNTL);
out_be32(&ddr->cs0_config_2, DDR_CS0_CONFIG_2); out_be32(&ddr->cs0_config_2, DDR_CS0_CONFIG_2);
/* DDR erratum A-009942 */
tmp = in_be32(&ddr->debug[28]);
out_be32(&ddr->debug[28], tmp | 0x0070006f);
udelay(1); udelay(1);
#ifdef CONFIG_DEEP_SLEEP #ifdef CONFIG_DEEP_SLEEP