mirrors/u-boot
0
0
Fork 0
mirror of https://github.com/u-boot/u-boot.git synced 2024-11-26 13:44:29 +08:00
Code Issues Packages Projects Releases Wiki Activity

powerpc/8xxx: Fix quad-rank DIMMs support on corenet_ds board.

Browse Source 
The board specific parameters associated with quad rank dimms where
missing.  This fixes it so the board will function if quad rank dimms
are placed in it.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
york 2010-07-02 22:25:59 +00:00 committed by Kumar Gala
parent ed062e0f6c
commit 90870d9846
2 changed files with 18 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
board/freescale/corenet_ds/ddr.c
View File

@ -66,11 +66,19 @@ typedef struct {
* seem reliable, but errors will appear when memory intensive
* program is run. */
/* XXX: Single rank at 800 MHz is OK. */
const board_specific_parameters_t board_specific_parameters[][20] = {
const board_specific_parameters_t board_specific_parameters[][30] = {
{
/* memory controller 0 */
/* lo| hi| num| clk| cpo|wrdata|2T */
/* mhz| mhz|ranks|adjst| | delay| */
{ 0, 333, 4, 6, 7, 3, 0},
{334, 400, 4, 6, 9, 3, 0},
{401, 549, 4, 6, 11, 3, 0},
{550, 680, 4, 1, 10, 5, 0},
{681, 850, 4, 1, 12, 5, 0},
{851, 1050, 4, 1, 12, 5, 0},
{1051, 1250, 4, 1, 15, 4, 0},
{1251, 1350, 4, 1, 15, 4, 0},
{ 0, 333, 2, 6, 7, 3, 0},
{334, 400, 2, 6, 9, 3, 0},
{401, 549, 2, 6, 11, 3, 0},
@ -90,6 +98,14 @@ const board_specific_parameters_t board_specific_parameters[][20] = {
/* memory controller 1 */
/* lo| hi| num| clk| cpo|wrdata|2T */
/* mhz| mhz|ranks|adjst| | delay| */
{ 0, 333, 4, 6, 7, 3, 0},
{334, 400, 4, 6, 9, 3, 0},
{401, 549, 4, 6, 11, 3, 0},
{550, 680, 4, 1, 10, 5, 0},
{681, 850, 4, 1, 12, 5, 0},
{851, 1050, 4, 1, 12, 5, 0},
{1051, 1250, 4, 1, 15, 4, 0},
{1251, 1350, 4, 1, 15, 4, 0},
{ 0, 333, 2, 6, 7, 3, 0},
{334, 400, 2, 6, 9, 3, 0},
{401, 549, 2, 6, 11, 3, 0},

2
include/configs/corenet_ds.h
View File

@ -124,7 +124,7 @@
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
#define CONFIG_FSL_DDR3