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powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps()
Reduce the calculation error to 1ps. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -20,7 +20,8 @@
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#define ULL_8FS 0xFFFFFFFFULL
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/*
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* Round mclk_ps to nearest 10 ps in memory controller code.
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* Round up mclk_ps to nearest 1 ps in memory controller code
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* if the error is 0.5ps or more.
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*
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* If an imprecise data rate is too high due to rounding error
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* propagation, compute a suitably rounded mclk_ps to compute
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@ -32,42 +33,37 @@ unsigned int get_memory_clk_period_ps(void)
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unsigned int result;
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/* Round to nearest 10ps, being careful about 64-bit multiply/divide */
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unsigned long long mclk_ps = ULL_2E12;
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/* Add 5*data_rate, for rounding */
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mclk_ps += 5*(unsigned long long)data_rate;
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unsigned long long rem, mclk_ps = ULL_2E12;
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/* Now perform the big divide, the result fits in 32-bits */
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do_div(mclk_ps, data_rate);
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result = mclk_ps;
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rem = do_div(mclk_ps, data_rate);
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result = (rem >= (data_rate >> 1)) ? mclk_ps + 1 : mclk_ps;
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/* We still need to round to 10ps */
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return 10 * (result/10);
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return result;
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}
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/* Convert picoseconds into DRAM clock cycles (rounding up if needed). */
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unsigned int picos_to_mclk(unsigned int picos)
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{
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unsigned long long clks, clks_rem;
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unsigned long data_rate = get_ddr_freq(0);
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/* Short circuit for zero picos */
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if (!picos)
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return 0;
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/* First multiply the time by the data rate (32x32 => 64) */
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clks = picos * (unsigned long long)get_ddr_freq(0);
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clks = picos * (unsigned long long)data_rate;
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/*
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* Now divide by 5^12 and track the 32-bit remainder, then divide
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* by 2*(2^12) using shifts (and updating the remainder).
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*/
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clks_rem = do_div(clks, UL_5POW12);
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clks_rem <<= 13;
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clks_rem |= clks & (UL_2POW13-1);
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clks_rem += (clks & (UL_2POW13-1)) * UL_5POW12;
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clks >>= 13;
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/* If we had a remainder, then round up */
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if (clks_rem)
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/* If we had a remainder greater than the 1ps error, then round up */
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if (clks_rem > data_rate)
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clks++;
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/* Clamp to the maximum representable value */
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