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arm: omap3: fix SRAM copy and execution sequence
Fix size calculation in copy of go_to_speed into SRAM. Use SRAM_CLK_CODE in call to SRAM-based go_to_speed. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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@ -183,8 +183,7 @@ static void dpll3_init_34xx(u32 sil_index, u32 clk_index)
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* if running from flash, jump to small relocated code
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* area in SRAM.
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*/
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f_lock_pll = (void *) ((u32) &_end_vect - (u32) &_start +
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SRAM_VECT_CODE);
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f_lock_pll = (void *) (SRAM_CLK_CODE);
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p0 = readl(&prcm_base->clken_pll);
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sr32(&p0, 0, 3, PLL_FAST_RELOCK_BYPASS);
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@ -401,8 +400,7 @@ static void dpll3_init_36xx(u32 sil_index, u32 clk_index)
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* if running from flash, jump to small relocated code
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* area in SRAM.
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*/
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f_lock_pll = (void *) ((u32) &_end_vect - (u32) &_start +
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SRAM_VECT_CODE);
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f_lock_pll = (void *) (SRAM_CLK_CODE);
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p0 = readl(&prcm_base->clken_pll);
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sr32(&p0, 0, 3, PLL_FAST_RELOCK_BYPASS);
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@ -69,15 +69,13 @@ ENDPROC(do_omap3_emu_romcode_call)
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*************************************************************************/
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ENTRY(cpy_clk_code)
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/* Copy DPLL code into SRAM */
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adr r0, go_to_speed /* get addr of clock setting code */
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mov r2, #384 /* r2 size to copy (div by 32 bytes) */
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mov r1, r1 /* r1 <- dest address (passed in) */
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add r2, r2, r0 /* r2 <- source end address */
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adr r0, go_to_speed /* copy from start of go_to_speed... */
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adr r2, lowlevel_init /* ... up to start of low_level_init */
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next2:
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ldmia r0!, {r3 - r10} /* copy from source address [r0] */
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stmia r1!, {r3 - r10} /* copy to target address [r1] */
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cmp r0, r2 /* until source end address [r2] */
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bne next2
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blo next2
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mov pc, lr /* back to caller */
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ENDPROC(cpy_clk_code)
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@ -63,6 +63,4 @@ extern dpll_param *get_36x_core_dpll_param(void);
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extern dpll_param *get_36x_per_dpll_param(void);
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extern dpll_param *get_36x_per2_dpll_param(void);
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extern void *_end_vect, *_start;
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#endif
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