mirror of
https://github.com/u-boot/u-boot.git
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ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.2
Backport and squash below Linux 5.2 commits for R-Car Gen3:
Commit id * Summary line
6fffb98645e67b5 arm64: dts: renesas: r8a77990: ebisu: Add GPIO expander
b068ed6efe6244d arm64: dts: renesas: r8a77990: Fix SPDX license identifier style
96c25882252704d ! arm64: dts: renesas: r8a7796: remove unneeded sound #address/size-cells
71ac75dffdae2f8 arm64: dts: renesas: r8a77990: ebisu: Enable LVDS1 encoder
9a0ff5c727b60a3 arm64: dts: renesas: r8a77995: draak: Enable LVDS1 encoder
9130c15829846fa arm64: dts: renesas: ebisu: Fix adv7482 hexadecimal register address
191f7dcd1f5ea1f arm64: dts: renesas: r8a77965: add SSIU support for sound
a8f6110e64422d5 arm64: dts: renesas: ebisu: Enable VIN5
4162aa9db3d4469 arm64: dts: renesas: r8a77995: draak: Enable CAN0, CAN1
af965ba3248edde arm64: dts: renesas: r8a77990: Remove invalid compatible value for CSI40
1f4c123a98098cc arm64: dts: renesas: r8a77990-ebisu: Add BD9571 PMIC
474706117c2baa6 arm64: dts: renesas: ebisu: Add PMIC DDR0 Backup Power config
e2fa79de7ecbef4 arm64: dts: renesas: Update Ebisu and Draak bootargs
de8e8daaf7190ef arm64: dts: renesas: salvator-common: Sort node label
05f1d882d28b871 arm64: dts: renesas: r8a77995: draak: Fix EthernetAVB phy mode to rgmii
7a516e49d975311 arm64: dts: renesas: use extended audio dmac register
e3414b8c45afa5c arm64: dts: renesas: salvator-common: Add GPIO keys support
720066d17c973fd arm64: dts: renesas: r8a7795: Add CMT device nodes
99cb95103e2d058 arm64: dts: renesas: r8a77965: Add CMT device nodes
28a5c61b5136d58 arm64: dts: renesas: r8a77990: Add CMT device nodes
32d622f3290b2a1 arm64: dts: renesas: r8a77965: Remove reg-names of display node
(*) Patch id mismatch between Linux and U-Boot commit.
[!] Dropped changes in arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts,
since the file doesn't exist in the U-Boot tree.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
This commit is contained in:
Eugeniu Rosca
Marek Vasut
parent
70f3b164a6
commit
89c00f009c
@ -462,6 +462,76 @@
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reg = <0 0xe6060000 0 0x50c>;
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};
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cmt0: timer@e60f0000 {
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compatible = "renesas,r8a7795-cmt0",
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"renesas,rcar-gen3-cmt0";
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reg = <0 0xe60f0000 0 0x1004>;
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 303>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 303>;
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status = "disabled";
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};
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cmt1: timer@e6130000 {
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compatible = "renesas,r8a7795-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6130000 0 0x1004>;
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interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 302>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 302>;
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status = "disabled";
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};
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cmt2: timer@e6140000 {
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compatible = "renesas,r8a7795-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6140000 0 0x1004>;
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interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 301>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 301>;
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status = "disabled";
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};
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cmt3: timer@e6148000 {
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compatible = "renesas,r8a7795-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6148000 0 0x1004>;
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interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 300>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 300>;
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status = "disabled";
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};
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cpg: clock-controller@e6150000 {
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compatible = "renesas,r8a7795-cpg-mssr";
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reg = <0 0xe6150000 0 0x1000>;
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@ -1836,7 +1906,7 @@
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<0 0xec5a0000 0 0x100>, /* ADG */
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<0 0xec540000 0 0x1000>, /* SSIU */
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<0 0xec541000 0 0x280>, /* SSI */
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<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
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<0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
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reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
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clocks = <&cpg CPG_MOD 1005>,
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@ -68,6 +68,7 @@
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ports {
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/* rsnd_port0 is on salvator-common */
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rsnd_port1: port@1 {
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reg = <1>;
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rsnd_endpoint1: endpoint {
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remote-endpoint = <&dw_hdmi0_snd_in>;
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@ -1775,7 +1775,7 @@
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<0 0xec5a0000 0 0x100>, /* ADG */
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<0 0xec540000 0 0x1000>, /* SSIU */
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<0 0xec541000 0 0x280>, /* SSI */
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<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
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<0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
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reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
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clocks = <&cpg CPG_MOD 1005>,
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@ -2162,17 +2162,6 @@
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dma-names = "rx", "tx";
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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};
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port@1 {
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reg = <1>;
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};
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};
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};
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audma0: dma-controller@ec700000 {
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@ -317,6 +317,76 @@
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reg = <0 0xe6060000 0 0x50c>;
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};
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cmt0: timer@e60f0000 {
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compatible = "renesas,r8a77965-cmt0",
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"renesas,rcar-gen3-cmt0";
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reg = <0 0xe60f0000 0 0x1004>;
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 303>;
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clock-names = "fck";
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power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
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resets = <&cpg 303>;
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status = "disabled";
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};
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cmt1: timer@e6130000 {
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compatible = "renesas,r8a77965-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6130000 0 0x1004>;
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interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 302>;
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clock-names = "fck";
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power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
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resets = <&cpg 302>;
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status = "disabled";
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};
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cmt2: timer@e6140000 {
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compatible = "renesas,r8a77965-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6140000 0 0x1004>;
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interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 301>;
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clock-names = "fck";
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power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
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resets = <&cpg 301>;
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status = "disabled";
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};
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cmt3: timer@e6148000 {
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compatible = "renesas,r8a77965-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6148000 0 0x1004>;
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interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 300>;
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clock-names = "fck";
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power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
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resets = <&cpg 300>;
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status = "disabled";
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};
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cpg: clock-controller@e6150000 {
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compatible = "renesas,r8a77965-cpg-mssr";
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reg = <0 0xe6150000 0 0x1000>;
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@ -1461,7 +1531,7 @@
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<0 0xec5a0000 0 0x100>, /* ADG */
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<0 0xec540000 0 0x1000>, /* SSIU */
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<0 0xec541000 0 0x280>, /* SSI */
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<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
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<0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
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reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
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clocks = <&cpg CPG_MOD 1005>,
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@ -1585,56 +1655,267 @@
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};
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};
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rcar_sound,ssiu {
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ssiu00: ssiu-0 {
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dmas = <&audma0 0x15>, <&audma1 0x16>;
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dma-names = "rx", "tx";
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};
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ssiu01: ssiu-1 {
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dmas = <&audma0 0x35>, <&audma1 0x36>;
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dma-names = "rx", "tx";
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};
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ssiu02: ssiu-2 {
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dmas = <&audma0 0x37>, <&audma1 0x38>;
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dma-names = "rx", "tx";
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};
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ssiu03: ssiu-3 {
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dmas = <&audma0 0x47>, <&audma1 0x48>;
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dma-names = "rx", "tx";
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};
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ssiu04: ssiu-4 {
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dmas = <&audma0 0x3F>, <&audma1 0x40>;
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dma-names = "rx", "tx";
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};
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ssiu05: ssiu-5 {
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dmas = <&audma0 0x43>, <&audma1 0x44>;
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dma-names = "rx", "tx";
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};
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ssiu06: ssiu-6 {
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dmas = <&audma0 0x4F>, <&audma1 0x50>;
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dma-names = "rx", "tx";
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};
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ssiu07: ssiu-7 {
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dmas = <&audma0 0x53>, <&audma1 0x54>;
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dma-names = "rx", "tx";
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};
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ssiu10: ssiu-8 {
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dmas = <&audma0 0x49>, <&audma1 0x4a>;
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dma-names = "rx", "tx";
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};
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ssiu11: ssiu-9 {
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dmas = <&audma0 0x4B>, <&audma1 0x4C>;
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dma-names = "rx", "tx";
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};
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ssiu12: ssiu-10 {
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dmas = <&audma0 0x57>, <&audma1 0x58>;
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dma-names = "rx", "tx";
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};
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ssiu13: ssiu-11 {
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dmas = <&audma0 0x59>, <&audma1 0x5A>;
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dma-names = "rx", "tx";
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};
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ssiu14: ssiu-12 {
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dmas = <&audma0 0x5F>, <&audma1 0x60>;
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dma-names = "rx", "tx";
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};
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ssiu15: ssiu-13 {
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dmas = <&audma0 0xC3>, <&audma1 0xC4>;
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dma-names = "rx", "tx";
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};
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ssiu16: ssiu-14 {
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dmas = <&audma0 0xC7>, <&audma1 0xC8>;
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dma-names = "rx", "tx";
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};
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ssiu17: ssiu-15 {
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dmas = <&audma0 0xCB>, <&audma1 0xCC>;
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dma-names = "rx", "tx";
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};
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ssiu20: ssiu-16 {
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dmas = <&audma0 0x63>, <&audma1 0x64>;
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dma-names = "rx", "tx";
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};
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ssiu21: ssiu-17 {
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dmas = <&audma0 0x67>, <&audma1 0x68>;
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dma-names = "rx", "tx";
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};
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ssiu22: ssiu-18 {
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dmas = <&audma0 0x6B>, <&audma1 0x6C>;
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dma-names = "rx", "tx";
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};
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ssiu23: ssiu-19 {
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dmas = <&audma0 0x6D>, <&audma1 0x6E>;
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dma-names = "rx", "tx";
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};
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ssiu24: ssiu-20 {
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dmas = <&audma0 0xCF>, <&audma1 0xCE>;
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dma-names = "rx", "tx";
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};
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ssiu25: ssiu-21 {
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dmas = <&audma0 0xEB>, <&audma1 0xEC>;
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dma-names = "rx", "tx";
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};
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ssiu26: ssiu-22 {
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dmas = <&audma0 0xED>, <&audma1 0xEE>;
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dma-names = "rx", "tx";
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};
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ssiu27: ssiu-23 {
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dmas = <&audma0 0xEF>, <&audma1 0xF0>;
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dma-names = "rx", "tx";
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};
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ssiu30: ssiu-24 {
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dmas = <&audma0 0x6f>, <&audma1 0x70>;
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dma-names = "rx", "tx";
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};
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ssiu31: ssiu-25 {
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dmas = <&audma0 0x21>, <&audma1 0x22>;
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dma-names = "rx", "tx";
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};
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ssiu32: ssiu-26 {
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dmas = <&audma0 0x23>, <&audma1 0x24>;
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dma-names = "rx", "tx";
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};
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ssiu33: ssiu-27 {
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dmas = <&audma0 0x25>, <&audma1 0x26>;
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dma-names = "rx", "tx";
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};
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ssiu34: ssiu-28 {
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dmas = <&audma0 0x27>, <&audma1 0x28>;
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dma-names = "rx", "tx";
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};
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ssiu35: ssiu-29 {
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dmas = <&audma0 0x29>, <&audma1 0x2A>;
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dma-names = "rx", "tx";
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};
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ssiu36: ssiu-30 {
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dmas = <&audma0 0x2B>, <&audma1 0x2C>;
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dma-names = "rx", "tx";
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};
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ssiu37: ssiu-31 {
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dmas = <&audma0 0x2D>, <&audma1 0x2E>;
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dma-names = "rx", "tx";
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};
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ssiu40: ssiu-32 {
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dmas = <&audma0 0x71>, <&audma1 0x72>;
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dma-names = "rx", "tx";
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};
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ssiu41: ssiu-33 {
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dmas = <&audma0 0x17>, <&audma1 0x18>;
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dma-names = "rx", "tx";
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};
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ssiu42: ssiu-34 {
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dmas = <&audma0 0x19>, <&audma1 0x1A>;
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dma-names = "rx", "tx";
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};
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ssiu43: ssiu-35 {
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dmas = <&audma0 0x1B>, <&audma1 0x1C>;
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dma-names = "rx", "tx";
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};
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ssiu44: ssiu-36 {
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dmas = <&audma0 0x1D>, <&audma1 0x1E>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu45: ssiu-37 {
|
||||
dmas = <&audma0 0x1F>, <&audma1 0x20>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu46: ssiu-38 {
|
||||
dmas = <&audma0 0x31>, <&audma1 0x32>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu47: ssiu-39 {
|
||||
dmas = <&audma0 0x33>, <&audma1 0x34>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu50: ssiu-40 {
|
||||
dmas = <&audma0 0x73>, <&audma1 0x74>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu60: ssiu-41 {
|
||||
dmas = <&audma0 0x75>, <&audma1 0x76>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu70: ssiu-42 {
|
||||
dmas = <&audma0 0x79>, <&audma1 0x7a>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu80: ssiu-43 {
|
||||
dmas = <&audma0 0x7b>, <&audma1 0x7c>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu90: ssiu-44 {
|
||||
dmas = <&audma0 0x7d>, <&audma1 0x7e>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu91: ssiu-45 {
|
||||
dmas = <&audma0 0x7F>, <&audma1 0x80>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu92: ssiu-46 {
|
||||
dmas = <&audma0 0x81>, <&audma1 0x82>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu93: ssiu-47 {
|
||||
dmas = <&audma0 0x83>, <&audma1 0x84>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu94: ssiu-48 {
|
||||
dmas = <&audma0 0xA3>, <&audma1 0xA4>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu95: ssiu-49 {
|
||||
dmas = <&audma0 0xA5>, <&audma1 0xA6>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu96: ssiu-50 {
|
||||
dmas = <&audma0 0xA7>, <&audma1 0xA8>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssiu97: ssiu-51 {
|
||||
dmas = <&audma0 0xA9>, <&audma1 0xAA>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
};
|
||||
|
||||
rcar_sound,ssi {
|
||||
ssi0: ssi-0 {
|
||||
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
dmas = <&audma0 0x01>, <&audma1 0x02>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssi1: ssi-1 {
|
||||
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
dmas = <&audma0 0x03>, <&audma1 0x04>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssi2: ssi-2 {
|
||||
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
dmas = <&audma0 0x05>, <&audma1 0x06>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssi3: ssi-3 {
|
||||
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
dmas = <&audma0 0x07>, <&audma1 0x08>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssi4: ssi-4 {
|
||||
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
dmas = <&audma0 0x09>, <&audma1 0x0a>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssi5: ssi-5 {
|
||||
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
dmas = <&audma0 0x0b>, <&audma1 0x0c>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssi6: ssi-6 {
|
||||
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
dmas = <&audma0 0x0d>, <&audma1 0x0e>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssi7: ssi-7 {
|
||||
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
dmas = <&audma0 0x0f>, <&audma1 0x10>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssi8: ssi-8 {
|
||||
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
dmas = <&audma0 0x11>, <&audma1 0x12>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssi9: ssi-9 {
|
||||
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
dmas = <&audma0 0x13>, <&audma1 0x14>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -2166,7 +2447,6 @@
|
||||
du: display@feb00000 {
|
||||
compatible = "renesas,du-r8a77965";
|
||||
reg = <0 0xfeb00000 0 0x80000>;
|
||||
reg-names = "du";
|
||||
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source for the ebisu board
|
||||
*
|
||||
@ -19,7 +19,7 @@
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel";
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
@ -337,6 +337,15 @@
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
|
||||
io_expander: gpio@20 {
|
||||
compatible = "onnn,pca9654";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
|
||||
hdmi-encoder@39 {
|
||||
compatible = "adi,adv7511w";
|
||||
reg = <0x39>;
|
||||
@ -398,7 +407,7 @@
|
||||
};
|
||||
|
||||
port@a {
|
||||
reg = <0xa>;
|
||||
reg = <10>;
|
||||
|
||||
adv7482_txa: endpoint {
|
||||
clock-lanes = <0>;
|
||||
@ -440,6 +449,28 @@
|
||||
};
|
||||
};
|
||||
|
||||
&i2c_dvfs {
|
||||
status = "okay";
|
||||
|
||||
clock-frequency = <400000>;
|
||||
|
||||
pmic: pmic@30 {
|
||||
pinctrl-0 = <&irq0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
compatible = "rohm,bd9571mwv";
|
||||
reg = <0x30>;
|
||||
interrupt-parent = <&intc_ex>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
rohm,ddr-backup-power = <0x1>;
|
||||
rohm,rstbmode-level;
|
||||
};
|
||||
};
|
||||
|
||||
&lvds0 {
|
||||
status = "okay";
|
||||
|
||||
@ -458,6 +489,13 @@
|
||||
};
|
||||
|
||||
&lvds1 {
|
||||
/*
|
||||
* Even though the LVDS1 output is not connected, the encoder must be
|
||||
* enabled to supply a pixel clock to the DU for the DPAD output when
|
||||
* LVDS0 is in use.
|
||||
*/
|
||||
status = "okay";
|
||||
|
||||
clocks = <&cpg CPG_MOD 727>,
|
||||
<&x13_clk>,
|
||||
<&extal_clk>;
|
||||
@ -495,6 +533,11 @@
|
||||
function = "du";
|
||||
};
|
||||
|
||||
irq0_pins: irq0 {
|
||||
groups = "intc_ex_irq0";
|
||||
function = "intc_ex";
|
||||
};
|
||||
|
||||
pwm3_pins: pwm3 {
|
||||
groups = "pwm3_b";
|
||||
function = "pwm3";
|
||||
@ -650,6 +693,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vin5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&xhci0 {
|
||||
pinctrl-0 = <&usb30_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source for the R-Car E3 (R8A77990) SoC
|
||||
*
|
||||
@ -284,6 +284,76 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cmt0: timer@e60f0000 {
|
||||
compatible = "renesas,r8a77990-cmt0",
|
||||
"renesas,rcar-gen3-cmt0";
|
||||
reg = <0 0xe60f0000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 303>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 303>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cmt1: timer@e6130000 {
|
||||
compatible = "renesas,r8a77990-cmt1",
|
||||
"renesas,rcar-gen3-cmt1";
|
||||
reg = <0 0xe6130000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 302>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 302>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cmt2: timer@e6140000 {
|
||||
compatible = "renesas,r8a77990-cmt1",
|
||||
"renesas,rcar-gen3-cmt1";
|
||||
reg = <0 0xe6140000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 301>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 301>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cmt3: timer@e6148000 {
|
||||
compatible = "renesas,r8a77990-cmt1",
|
||||
"renesas,rcar-gen3-cmt1";
|
||||
reg = <0 0xe6148000 0 0x1004>;
|
||||
interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 300>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 300>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpg: clock-controller@e6150000 {
|
||||
compatible = "renesas,r8a77990-cpg-mssr";
|
||||
reg = <0 0xe6150000 0 0x1000>;
|
||||
@ -1656,7 +1726,7 @@
|
||||
};
|
||||
|
||||
csi40: csi2@feaa0000 {
|
||||
compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2";
|
||||
compatible = "renesas,r8a77990-csi2";
|
||||
reg = <0 0xfeaa0000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 716>;
|
||||
|
||||
@ -20,7 +20,7 @@
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "ignore_loglevel";
|
||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
@ -168,7 +168,6 @@
|
||||
pinctrl-names = "default";
|
||||
renesas,no-ether-link;
|
||||
phy-handle = <&phy0>;
|
||||
phy-mode = "rgmii-txid";
|
||||
status = "okay";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
@ -179,6 +178,18 @@
|
||||
};
|
||||
};
|
||||
|
||||
&can0 {
|
||||
pinctrl-0 = <&can0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&can1 {
|
||||
pinctrl-0 = <&can1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&du {
|
||||
pinctrl-0 = <&du_pins>;
|
||||
pinctrl-names = "default";
|
||||
@ -356,6 +367,13 @@
|
||||
};
|
||||
|
||||
&lvds1 {
|
||||
/*
|
||||
* Even though the LVDS1 output is not connected, the encoder must be
|
||||
* enabled to supply a pixel clock to the DU for the DPAD output when
|
||||
* LVDS0 is in use.
|
||||
*/
|
||||
status = "okay";
|
||||
|
||||
clocks = <&cpg CPG_MOD 727>,
|
||||
<&x12_clk>,
|
||||
<&extal_clk>;
|
||||
@ -375,6 +393,16 @@
|
||||
};
|
||||
};
|
||||
|
||||
can0_pins: can0 {
|
||||
groups = "can0_data_a";
|
||||
function = "can0";
|
||||
};
|
||||
|
||||
can1_pins: can1 {
|
||||
groups = "can1_data_a";
|
||||
function = "can1";
|
||||
};
|
||||
|
||||
du_pins: du {
|
||||
groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
|
||||
function = "du";
|
||||
|
||||
@ -29,6 +29,7 @@
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
@ -86,6 +87,63 @@
|
||||
};
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
pinctrl-0 = <&keys_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
key-1 {
|
||||
gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_1>;
|
||||
label = "SW4-1";
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-2 {
|
||||
gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_2>;
|
||||
label = "SW4-2";
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-3 {
|
||||
gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_3>;
|
||||
label = "SW4-3";
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-4 {
|
||||
gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_4>;
|
||||
label = "SW4-4";
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-a {
|
||||
gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_A>;
|
||||
label = "TSW0";
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-b {
|
||||
gpios = <&gpio6 12 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_B>;
|
||||
label = "TSW1";
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
key-c {
|
||||
gpios = <&gpio6 13 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_C>;
|
||||
label = "TSW2";
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
};
|
||||
};
|
||||
|
||||
reg_1p8v: regulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-1.8V";
|
||||
@ -572,6 +630,11 @@
|
||||
function = "intc_ex";
|
||||
};
|
||||
|
||||
keys_pins: keys {
|
||||
pins = "GP_5_17", "GP_5_20", "GP_5_22";
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
pwm1_pins: pwm1 {
|
||||
groups = "pwm1_a";
|
||||
function = "pwm1";
|
||||
@ -719,6 +782,11 @@
|
||||
};
|
||||
};
|
||||
|
||||
&rwdt {
|
||||
timeout-sec = <60>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&scif1 {
|
||||
pinctrl-0 = <&scif1_pins>;
|
||||
pinctrl-names = "default";
|
||||
@ -857,11 +925,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rwdt {
|
||||
timeout-sec = <60>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&xhci0 {
|
||||
pinctrl-0 = <&usb30_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
Loading…
Reference in New Issue
Block a user