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tegra: dts: Bring in GPIO bindings from linux
These files are taken from Linux 3.14. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Simon Glass
parent
184b1b7175
commit
8946034a31
@ -1,3 +1,6 @@
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#include <dt-bindings/gpio/tegra-gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton.dtsi"
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/ {
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@ -46,17 +49,17 @@
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0 143 0x04>;
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};
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gpio: gpio {
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gpio: gpio@6000d000 {
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compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
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reg = <0x6000d000 0x1000>;
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interrupts = <0 32 0x04
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0 33 0x04
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0 34 0x04
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0 35 0x04
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0 55 0x04
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0 87 0x04
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0 89 0x04
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0 125 0x04>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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@ -1,3 +1,6 @@
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#include <dt-bindings/gpio/tegra-gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton.dtsi"
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/ {
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@ -49,14 +52,14 @@
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gpio: gpio@6000d000 {
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compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
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reg = <0x6000d000 0x1000>;
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interrupts = <0 32 0x04
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0 33 0x04
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0 34 0x04
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0 35 0x04
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0 55 0x04
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0 87 0x04
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0 89 0x04
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0 125 0x04>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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@ -1,3 +1,6 @@
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#include <dt-bindings/gpio/tegra-gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton.dtsi"
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/ {
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@ -139,10 +142,18 @@
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gpio: gpio@6000d000 {
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compatible = "nvidia,tegra20-gpio";
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reg = < 0x6000d000 0x1000 >;
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interrupts = < 64 65 66 67 87 119 121 >;
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reg = <0x6000d000 0x1000>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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pinmux: pinmux@70000000 {
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@ -1,3 +1,6 @@
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#include <dt-bindings/gpio/tegra-gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton.dtsi"
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/ {
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@ -47,17 +50,17 @@
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clocks = <&tegra_car 34>;
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};
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gpio: gpio {
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gpio: gpio@6000d000 {
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compatible = "nvidia,tegra30-gpio";
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reg = <0x6000d000 0x1000>;
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interrupts = <0 32 0x04
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0 33 0x04
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0 34 0x04
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0 35 0x04
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0 55 0x04
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0 87 0x04
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0 89 0x04
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0 125 0x04>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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15
include/dt-bindings/gpio/gpio.h
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15
include/dt-bindings/gpio/gpio.h
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/*
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* This header provides constants for most GPIO bindings.
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*
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* Most GPIO bindings include a flags cell as part of the GPIO specifier.
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* In most cases, the format of the flags cell uses the standard values
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* defined in this header.
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*/
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#ifndef _DT_BINDINGS_GPIO_GPIO_H
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#define _DT_BINDINGS_GPIO_GPIO_H
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#define GPIO_ACTIVE_HIGH 0
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#define GPIO_ACTIVE_LOW 1
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#endif
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51
include/dt-bindings/gpio/tegra-gpio.h
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51
include/dt-bindings/gpio/tegra-gpio.h
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/*
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* This header provides constants for binding nvidia,tegra*-gpio.
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*
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* The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
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* provide names for this.
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*
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* The second cell contains standard flag values specified in gpio.h.
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*/
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#ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H
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#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H
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#include <dt-bindings/gpio/gpio.h>
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#define TEGRA_GPIO_BANK_ID_A 0
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#define TEGRA_GPIO_BANK_ID_B 1
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#define TEGRA_GPIO_BANK_ID_C 2
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#define TEGRA_GPIO_BANK_ID_D 3
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#define TEGRA_GPIO_BANK_ID_E 4
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#define TEGRA_GPIO_BANK_ID_F 5
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#define TEGRA_GPIO_BANK_ID_G 6
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#define TEGRA_GPIO_BANK_ID_H 7
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#define TEGRA_GPIO_BANK_ID_I 8
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#define TEGRA_GPIO_BANK_ID_J 9
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#define TEGRA_GPIO_BANK_ID_K 10
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#define TEGRA_GPIO_BANK_ID_L 11
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#define TEGRA_GPIO_BANK_ID_M 12
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#define TEGRA_GPIO_BANK_ID_N 13
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#define TEGRA_GPIO_BANK_ID_O 14
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#define TEGRA_GPIO_BANK_ID_P 15
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#define TEGRA_GPIO_BANK_ID_Q 16
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#define TEGRA_GPIO_BANK_ID_R 17
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#define TEGRA_GPIO_BANK_ID_S 18
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#define TEGRA_GPIO_BANK_ID_T 19
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#define TEGRA_GPIO_BANK_ID_U 20
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#define TEGRA_GPIO_BANK_ID_V 21
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#define TEGRA_GPIO_BANK_ID_W 22
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#define TEGRA_GPIO_BANK_ID_X 23
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#define TEGRA_GPIO_BANK_ID_Y 24
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#define TEGRA_GPIO_BANK_ID_Z 25
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#define TEGRA_GPIO_BANK_ID_AA 26
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#define TEGRA_GPIO_BANK_ID_BB 27
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#define TEGRA_GPIO_BANK_ID_CC 28
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#define TEGRA_GPIO_BANK_ID_DD 29
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#define TEGRA_GPIO_BANK_ID_EE 30
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#define TEGRA_GPIO_BANK_ID_FF 31
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#define TEGRA_GPIO(bank, offset) \
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((TEGRA_GPIO_BANK_ID_##bank * 8) + offset)
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#endif
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22
include/dt-bindings/interrupt-controller/arm-gic.h
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22
include/dt-bindings/interrupt-controller/arm-gic.h
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/*
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* This header provides constants for the ARM GIC.
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*/
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#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
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#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
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#include <dt-bindings/interrupt-controller/irq.h>
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/* interrupt specific cell 0 */
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#define GIC_SPI 0
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#define GIC_PPI 1
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/*
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* Interrupt specifier cell 2.
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* The flaggs in irq.h are valid, plus those below.
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*/
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#define GIC_CPU_MASK_RAW(x) ((x) << 8)
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#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
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#endif
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19
include/dt-bindings/interrupt-controller/irq.h
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19
include/dt-bindings/interrupt-controller/irq.h
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/*
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* This header provides constants for most IRQ bindings.
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*
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* Most IRQ bindings include a flags cell as part of the IRQ specifier.
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* In most cases, the format of the flags cell uses the standard values
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* defined in this header.
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*/
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#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
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#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
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#define IRQ_TYPE_NONE 0
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#define IRQ_TYPE_EDGE_RISING 1
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#define IRQ_TYPE_EDGE_FALLING 2
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#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
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#define IRQ_TYPE_LEVEL_HIGH 4
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#define IRQ_TYPE_LEVEL_LOW 8
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#endif
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