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ppc4xx: icon: add support for SM502 chip
Adds initialization code for SM502 graphics controller and NL6448BC20-21D LCD panel. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefan Roese <sr@denx.de>
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@ -317,3 +317,72 @@ int board_pcie_last(void)
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/* Only 2 PCIe ports used on ICON, so the last one is 1 */
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return 1;
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}
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/*
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* Video
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*/
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#ifdef CONFIG_VIDEO_SM501
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#include <sm501.h>
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#define DISPLAY_WIDTH 640
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#define DISPLAY_HEIGHT 480
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static const SMI_REGS sm502_init_regs[] = {
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{0x00004, 0x0},
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{0x00040, 0x00021847},
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{0x00044, 0x091a0a01}, /* 24 MHz pixclk */
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{0x00054, 0x0},
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{0x00048, 0x00021847},
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{0x0004C, 0x091a0a01},
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{0x00054, 0x1},
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{0x80004, 0xc428bb17},
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{0x8000C, 0x00000000},
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{0x80010, 0x0a000a00},
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{0x80014, 0x02800000},
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{0x80018, 0x01e00000},
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{0x8001C, 0x00000000},
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{0x80020, 0x01e00280},
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{0x80024, 0x02fa027f},
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{0x80028, 0x004a0280},
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{0x8002C, 0x020c01df},
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{0x80030, 0x000201e7},
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{0x80200, 0x00010000},
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{0x00008, 0x20000000}, /* gpio29 is pwm0, LED_PWM */
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{0x0000C, 0x3f000000}, /* gpio56 - gpio61 as flat panel data pins */
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{0x10020, 0x25725728}, /* 20 kHz pwm0, 50 % duty cycle, disabled */
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{0x80000, 0x0f010106}, /* vsync & hsync pos, disp on */
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{0, 0}
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};
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/*
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* Return a pointer to the register initialization table.
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*/
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const SMI_REGS *board_get_regs(void)
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{
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return sm502_init_regs;
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}
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int board_get_width(void)
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{
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return DISPLAY_WIDTH;
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}
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int board_get_height(void)
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{
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return DISPLAY_HEIGHT;
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}
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#ifdef CONFIG_CONSOLE_EXTRA_INFO
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/*
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* Return text to be printed besides the logo.
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*/
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void video_get_info_str(int line_number, char *info)
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{
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if (line_number == 1)
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strcpy(info, " Board: ICON");
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else
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info[0] = '\0';
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}
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#endif
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#endif /* CONFIG_VIDEO_SM501 */
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@ -142,6 +142,26 @@
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68
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#define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* play along with linux */
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/*
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* Video options
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*/
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#define CONFIG_VIDEO
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#ifdef CONFIG_VIDEO
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#define CONFIG_VIDEO_SM501
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#define CONFIG_VIDEO_SM501_32BPP
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#define CONFIG_VIDEO_SM501_PCI
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#define VIDEO_FB_LITTLE_ENDIAN
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_CONSOLE_EXTRA_INFO
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_VIDEO_SW_CURSOR
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_SPLASH_SCREEN
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#define CFG_CONSOLE_IS_IN_ENV
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#endif
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/*
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* Environment
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*/
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@ -171,6 +191,9 @@
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#define CONFIG_CMD_PCI
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#define CONFIG_CMD_SDRAM
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#define CONFIG_CMD_SNTP
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#ifdef CONFIG_VIDEO
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#define CONFIG_CMD_BMP
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#endif
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#define CONFIG_IBM_EMAC4_V4 /* 440SPe has this EMAC version */
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#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
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