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ag7xxx: add initial support for s17
S17 ethernet support is for QCA8337N, which used on AP152 (QCA9563) board. It is a 7 ports GbE switch. Signed-off-by: Rosy Song <rosysong@rosinson.com> Changes for v2-v3: - add more commit message for s17 Changes for v4-v5: - coding style cleanup
This commit is contained in:
Rosy Song
Daniel Schwierzeck
parent
61290fb52c
commit
8426523af1
@ -3,6 +3,7 @@
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* Atheros AR71xx / AR9xxx GMAC driver
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*
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* Copyright (C) 2016 Marek Vasut <marex@denx.de>
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* Copyright (C) 2019 Rosy Song <rosysong@rosinson.com>
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*/
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#include <common.h>
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@ -23,7 +24,8 @@ DECLARE_GLOBAL_DATA_PTR;
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enum ag7xxx_model {
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AG7XXX_MODEL_AG933X,
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AG7XXX_MODEL_AG934X,
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AG7XXX_MODEL_AG953X
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AG7XXX_MODEL_AG953X,
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AG7XXX_MODEL_AG956X
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};
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/* MAC Configuration 1 */
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@ -219,6 +221,7 @@ static int ag7xxx_switch_reg_read(struct mii_dev *bus, int reg, u32 *val)
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u32 reg_addr;
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u32 phy_temp;
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u32 reg_temp;
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u32 reg_temp_w = (reg & 0xfffffffc) >> 1;
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u16 rv = 0;
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int ret;
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@ -226,18 +229,25 @@ static int ag7xxx_switch_reg_read(struct mii_dev *bus, int reg, u32 *val)
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priv->model == AG7XXX_MODEL_AG953X) {
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phy_addr = 0x1f;
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reg_addr = 0x10;
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} else if (priv->model == AG7XXX_MODEL_AG934X) {
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} else if (priv->model == AG7XXX_MODEL_AG934X ||
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priv->model == AG7XXX_MODEL_AG956X) {
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phy_addr = 0x18;
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reg_addr = 0x00;
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} else
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return -EINVAL;
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ret = ag7xxx_switch_write(bus, phy_addr, reg_addr, reg >> 9);
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if (priv->model == AG7XXX_MODEL_AG956X)
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ret = ag7xxx_switch_write(bus, phy_addr, reg_addr, (reg >> 9) & 0x1ff);
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else
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ret = ag7xxx_switch_write(bus, phy_addr, reg_addr, reg >> 9);
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if (ret)
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return ret;
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phy_temp = ((reg >> 6) & 0x7) | 0x10;
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reg_temp = (reg >> 1) & 0x1e;
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if (priv->model == AG7XXX_MODEL_AG956X)
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reg_temp = reg_temp_w & 0x1f;
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else
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reg_temp = (reg >> 1) & 0x1e;
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*val = 0;
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ret = ag7xxx_switch_read(bus, phy_temp, reg_temp | 0, &rv);
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@ -245,7 +255,13 @@ static int ag7xxx_switch_reg_read(struct mii_dev *bus, int reg, u32 *val)
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return ret;
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*val |= rv;
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ret = ag7xxx_switch_read(bus, phy_temp, reg_temp | 1, &rv);
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if (priv->model == AG7XXX_MODEL_AG956X) {
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phy_temp = (((reg_temp_w + 1) >> 5) & 0x7) | 0x10;
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reg_temp = (reg_temp_w + 1) & 0x1f;
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ret = ag7xxx_switch_read(bus, phy_temp, reg_temp, &rv);
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} else {
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ret = ag7xxx_switch_read(bus, phy_temp, reg_temp | 1, &rv);
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}
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if (ret < 0)
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return ret;
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*val |= (rv << 16);
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@ -260,24 +276,34 @@ static int ag7xxx_switch_reg_write(struct mii_dev *bus, int reg, u32 val)
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u32 reg_addr;
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u32 phy_temp;
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u32 reg_temp;
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u32 reg_temp_w = (reg & 0xfffffffc) >> 1;
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int ret;
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if (priv->model == AG7XXX_MODEL_AG933X ||
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priv->model == AG7XXX_MODEL_AG953X) {
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phy_addr = 0x1f;
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reg_addr = 0x10;
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} else if (priv->model == AG7XXX_MODEL_AG934X) {
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} else if (priv->model == AG7XXX_MODEL_AG934X ||
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priv->model == AG7XXX_MODEL_AG956X) {
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phy_addr = 0x18;
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reg_addr = 0x00;
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} else
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return -EINVAL;
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ret = ag7xxx_switch_write(bus, phy_addr, reg_addr, reg >> 9);
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if (priv->model == AG7XXX_MODEL_AG956X)
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ret = ag7xxx_switch_write(bus, phy_addr, reg_addr, (reg >> 9) & 0x1ff);
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else
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ret = ag7xxx_switch_write(bus, phy_addr, reg_addr, reg >> 9);
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if (ret)
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return ret;
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phy_temp = ((reg >> 6) & 0x7) | 0x10;
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reg_temp = (reg >> 1) & 0x1e;
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if (priv->model == AG7XXX_MODEL_AG956X) {
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reg_temp = (reg_temp_w + 1) & 0x1f;
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phy_temp = (((reg_temp_w + 1) >> 5) & 0x7) | 0x10;
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} else {
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phy_temp = ((reg >> 6) & 0x7) | 0x10;
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reg_temp = (reg >> 1) & 0x1e;
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}
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/*
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* The switch on AR933x has some special register behavior, which
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@ -296,10 +322,18 @@ static int ag7xxx_switch_reg_write(struct mii_dev *bus, int reg, u32 val)
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if (ret < 0)
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return ret;
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} else {
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ret = ag7xxx_switch_write(bus, phy_temp, reg_temp | 1, val >> 16);
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if (priv->model == AG7XXX_MODEL_AG956X)
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ret = ag7xxx_switch_write(bus, phy_temp, reg_temp, val >> 16);
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else
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ret = ag7xxx_switch_write(bus, phy_temp, reg_temp | 1, val >> 16);
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if (ret < 0)
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return ret;
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if (priv->model == AG7XXX_MODEL_AG956X) {
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phy_temp = ((reg_temp_w >> 5) & 0x7) | 0x10;
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reg_temp = reg_temp_w & 0x1f;
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}
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ret = ag7xxx_switch_write(bus, phy_temp, reg_temp | 0, val & 0xffff);
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if (ret < 0)
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return ret;
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@ -626,9 +660,12 @@ static int ag7xxx_mii_setup(struct udevice *dev)
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reg = 0x4;
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else if (priv->model == AG7XXX_MODEL_AG953X)
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reg = 0x2;
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else if (priv->model == AG7XXX_MODEL_AG956X)
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reg = 0x7;
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if (priv->model == AG7XXX_MODEL_AG934X ||
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priv->model == AG7XXX_MODEL_AG953X) {
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priv->model == AG7XXX_MODEL_AG953X ||
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priv->model == AG7XXX_MODEL_AG956X) {
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writel(AG7XXX_ETH_MII_MGMT_CFG_RESET | reg,
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priv->regs + AG7XXX_ETH_MII_MGMT_CFG);
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writel(reg, priv->regs + AG7XXX_ETH_MII_MGMT_CFG);
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@ -839,7 +876,8 @@ static int ag933x_phy_setup_reset_set(struct udevice *dev, int port)
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struct ar7xxx_eth_priv *priv = dev_get_priv(dev);
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int ret;
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if (priv->model == AG7XXX_MODEL_AG953X) {
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if (priv->model == AG7XXX_MODEL_AG953X ||
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priv->model == AG7XXX_MODEL_AG956X) {
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ret = ag7xxx_switch_write(priv->bus, port, MII_ADVERTISE,
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ADVERTISE_ALL);
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} else {
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@ -855,9 +893,15 @@ static int ag933x_phy_setup_reset_set(struct udevice *dev, int port)
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ADVERTISE_1000FULL);
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if (ret)
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return ret;
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} else if (priv->model == AG7XXX_MODEL_AG956X) {
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ret = ag7xxx_switch_write(priv->bus, port, MII_CTRL1000,
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ADVERTISE_1000FULL);
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if (ret)
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return ret;
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}
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if (priv->model == AG7XXX_MODEL_AG953X)
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if (priv->model == AG7XXX_MODEL_AG953X ||
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priv->model == AG7XXX_MODEL_AG956X)
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return ag7xxx_switch_write(priv->bus, port, MII_BMCR,
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BMCR_ANENABLE | BMCR_RESET);
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@ -871,7 +915,8 @@ static int ag933x_phy_setup_reset_fin(struct udevice *dev, int port)
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int ret;
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u16 reg;
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if (priv->model == AG7XXX_MODEL_AG953X) {
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if (priv->model == AG7XXX_MODEL_AG953X ||
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priv->model == AG7XXX_MODEL_AG956X) {
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do {
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ret = ag7xxx_switch_read(priv->bus, port, MII_BMCR, ®);
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if (ret < 0)
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@ -899,7 +944,8 @@ static int ag933x_phy_setup_common(struct udevice *dev)
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if (priv->model == AG7XXX_MODEL_AG933X)
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phymax = 4;
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else if (priv->model == AG7XXX_MODEL_AG934X ||
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priv->model == AG7XXX_MODEL_AG953X)
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priv->model == AG7XXX_MODEL_AG953X ||
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priv->model == AG7XXX_MODEL_AG956X)
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phymax = 5;
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else
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return -EINVAL;
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@ -939,7 +985,8 @@ static int ag933x_phy_setup_common(struct udevice *dev)
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for (i = 0; i < phymax; i++) {
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/* Read out link status */
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if (priv->model == AG7XXX_MODEL_AG953X)
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if (priv->model == AG7XXX_MODEL_AG953X ||
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priv->model == AG7XXX_MODEL_AG956X)
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ret = ag7xxx_switch_read(priv->bus, i, MII_MIPSCR, ®);
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else
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ret = ag7xxx_mdio_read(priv->bus, i, 0, MII_MIPSCR);
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@ -1004,6 +1051,63 @@ static int ag934x_phy_setup(struct udevice *dev)
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return 0;
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}
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static int ag956x_phy_setup(struct udevice *dev)
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{
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struct ar7xxx_eth_priv *priv = dev_get_priv(dev);
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int i, ret;
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u32 reg, ctrl;
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ret = ag7xxx_switch_reg_read(priv->bus, 0x0, ®);
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if (ret)
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return ret;
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if ((reg & 0xffff) >= 0x1301)
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ctrl = 0xc74164de;
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else
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ctrl = 0xc74164d0;
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ret = ag7xxx_switch_reg_write(priv->bus, 0x4, BIT(7));
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if (ret)
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return ret;
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ret = ag7xxx_switch_reg_write(priv->bus, 0xe0, ctrl);
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if (ret)
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return ret;
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ret = ag7xxx_switch_reg_write(priv->bus, 0x624, 0x7f7f7f7f);
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if (ret)
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return ret;
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/*
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* Values suggested by the switch team when s17 in sgmii
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* configuration. 0x10(S17_PWS_REG) = 0x602613a0
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*/
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ret = ag7xxx_switch_reg_write(priv->bus, 0x10, 0x602613a0);
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if (ret)
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return ret;
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ret = ag7xxx_switch_reg_write(priv->bus, 0x7c, 0x0000007e);
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if (ret)
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return ret;
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/* AR8337/AR8334 v1.0 fixup */
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ret = ag7xxx_switch_reg_read(priv->bus, 0, ®);
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if (ret)
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return ret;
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if ((reg & 0xffff) == 0x1301) {
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for (i = 0; i < 5; i++) {
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/* Turn on Gigabit clock */
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ret = ag7xxx_switch_write(priv->bus, i, 0x1d, 0x3d);
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if (ret)
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return ret;
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ret = ag7xxx_switch_write(priv->bus, i, 0x1e, 0x6820);
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if (ret)
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return ret;
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}
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}
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return 0;
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}
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static int ag7xxx_mac_probe(struct udevice *dev)
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{
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struct ar7xxx_eth_priv *priv = dev_get_priv(dev);
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@ -1028,6 +1132,8 @@ static int ag7xxx_mac_probe(struct udevice *dev)
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ret = ag953x_phy_setup_lan(dev);
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} else if (priv->model == AG7XXX_MODEL_AG934X) {
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ret = ag934x_phy_setup(dev);
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} else if (priv->model == AG7XXX_MODEL_AG956X) {
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ret = ag956x_phy_setup(dev);
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} else {
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return -EINVAL;
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}
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@ -1166,6 +1272,7 @@ static const struct udevice_id ag7xxx_eth_ids[] = {
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{ .compatible = "qca,ag933x-mac", .data = AG7XXX_MODEL_AG933X },
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{ .compatible = "qca,ag934x-mac", .data = AG7XXX_MODEL_AG934X },
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{ .compatible = "qca,ag953x-mac", .data = AG7XXX_MODEL_AG953X },
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{ .compatible = "qca,ag956x-mac", .data = AG7XXX_MODEL_AG956X },
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{ }
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};
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